ARM: dts: msm: Correct the IBI controller base address

corrected/rectified IBI controller base address.

Change-Id: Ib8b8c107be80a27c0e046528133ff3078c216ca6
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
This commit is contained in:
Anil Veshala Veshala
2023-11-20 19:21:05 -08:00
committed by Anil Kumar Veshala
parent 3da89570d2
commit 5f120fa1f8

View File

@@ -601,7 +601,7 @@
i3c3: i3c-master@880000 { i3c3: i3c-master@880000 {
compatible = "qcom,geni-i3c"; compatible = "qcom,geni-i3c";
reg = <0x880000 0x4000>, reg = <0x880000 0x4000>,
<0xecd0000 0x10000>; <0xecc0000 0x10000>;
clock-names = "se-clk"; clock-names = "se-clk";
clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnect-names = "qup-core", "qup-config", "qup-memory";