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ARM: dts: msm: Add RSC and PDC devices for SM6150

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This change adds apps & display rsc and pdc node
for SM6150 Target.

Change-Id: I174372330e040c7fa632fb9f52ad58c2b80b2b7e
Signed-off-by: Dhaval Radiya <quic_dradiya@quicinc.com>
This commit is contained in:
Dhaval Radiya
2025-03-05 15:17:58 +05:30
parent 24dfd1761e
commit 5aeca939b2
1 changed files with 56 additions and 0 deletions
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56
qcom/sm6150.dtsi
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@@ -4,6 +4,7 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
/ {
model = "Qualcomm Technologies, Inc. SM6150";
@@ -403,6 +404,52 @@
method = "smc";
};
apps_rsc: rsc@18200000 {
label = "apps_rsc";
compatible = "qcom,rpmh-rsc";
reg = <0x18200000 0x10000>,
<0x18210000 0x10000>,
<0x18220000 0x10000>;
reg-names = "drv-0", "drv-1", "drv-2";
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
qcom,drv-count = <3>;
apps_rsc_drv2: drv@2 {
qcom,drv-id = <2>;
qcom,tcs-offset = <0xd00>;
channel@0 {
qcom,tcs-config = <ACTIVE_TCS 2>,
<SLEEP_TCS 3>,
<WAKE_TCS 3>,
<CONTROL_TCS 1>,
<FAST_PATH_TCS 0>;
};
};
};
disp_rsc: rsc@af20000 {
label = "disp_rsc";
compatible = "qcom,rpmh-rsc";
reg = <0xaf20000 0x10000>;
reg-names = "drv-0";
qcom,drv-count = <1>;
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
disp_rsc_drv0: drv@0 {
qcom,drv-id = <0>;
qcom,tcs-offset = <0x1c00>;
channel@0 {
qcom,tcs-config = <SLEEP_TCS 1>,
<WAKE_TCS 1>,
<ACTIVE_TCS 2>,
<CONTROL_TCS 0>,
<FAST_PATH_TCS 0>;
};
};
};
intc: interrupt-controller@17a00000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
@@ -415,6 +462,15 @@
interrupt-parent = <&intc>;
};
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm6150-pdc", "qcom,pdc";
reg = <0xb220000 0x30000>, <0x17c000f0 0x60>;
qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>;
#interrupt-cells = <2>;
interrupt-parent = <&intc>;
interrupt-controller;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <1 1 0xf08>,