From 5adc01c6d2fcdc4d67ade2cb8a01b97ae2eb0e4c Mon Sep 17 00:00:00 2001
From: Prakash Yadachi <quic_pyadachi@quicinc.com>
Date: Thu, 11 Jul 2024 10:34:40 +0530
Subject: [PATCH] ARM: dts: qcom: Update proper clock name

Update uart clock name from se to se-clk for Ravelin.

Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: I320f94e166f54e41b633473ee3c85bb65fcffa6f
---
 qcom/ravelin-qupv3.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/qcom/ravelin-qupv3.dtsi b/qcom/ravelin-qupv3.dtsi
index f7e8c262..cd4af450 100644
--- a/qcom/ravelin-qupv3.dtsi
+++ b/qcom/ravelin-qupv3.dtsi
@@ -77,7 +77,7 @@
 			reg-names = "se_phys";
 			interrupts-extended = <&intc GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>,
 					<&tlmm 17 IRQ_TYPE_LEVEL_HIGH>;
-			clock-names = "se";
+			clock-names = "se-clk";
 			clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
 			interconnect-names = "qup-core", "qup-config", "qup-memory";
 			interconnects =