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Merge "dt-bindings: msm: Change LLCC bindings for Pineapple and Sun"

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This commit is contained in:
qctecmdr
2023-10-06 09:44:22 -07:00
committed by Gerrit - the friendly Code Review server
parent f205bf616e 8199522ad8
commit 59896c77b2
1 changed files with 43 additions and 11 deletions
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54
bindings/arm/msm/qcom,llcc.yaml
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@@ -32,17 +32,16 @@ properties:
- qcom,sm8350-llcc - qcom,sm8350-llcc
- qcom,sm8450-llcc - qcom,sm8450-llcc
- qcom,sm8550-llcc - qcom,sm8550-llcc
- qcom,pineapple-llcc
- qcom,sun-llcc - qcom,sun-llcc
reg: reg:
items: minItems: 2
- description: LLCC base register region maxItems: 9
- description: LLCC broadcast base register region
reg-names: reg-names:
items: minItems: 2
- const: llcc_base maxItems: 9
- const: llcc_broadcast_base
interrupts: interrupts:
maxItems: 1 maxItems: 1
@@ -52,15 +51,48 @@ required:
- reg - reg
- reg-names - reg-names
allOf:
- if:
properties:
compatible:
contains:
enum:
- qcom,pineapple-llcc
- qcom,sun-llcc
then:
properties:
reg:
items:
- description: LLCC0 base register region
- description: LLCC1 base register region
- description: LLCC2 base register region
- description: LLCC3 base register region
- description: LLCC broadcast base register region
reg-names:
items:
- const: llcc0_base
- const: llcc1_base
- const: llcc2_base
- const: llcc3_base
- const: llcc_broadcast_base
additionalProperties: false additionalProperties: false
examples: examples:
- | - |
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
system-cache-controller@1100000 { soc {
compatible = "qcom,sdm845-llcc"; #address-cells = <2>;
reg = <0x1100000 0x200000>, <0x1300000 0x50000> ; #size-cells = <2>;
reg-names = "llcc_base", "llcc_broadcast_base";
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; system-cache-controller@1100000 {
compatible = "qcom,sdm845-llcc";
reg = <0x01100000 0x50000>, <0x01180000 0x50000>,
<0x01200000 0x50000>, <0x01280000 0x50000>,
<0x1300000 0x50000> ;
reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
"llcc3_base", "llcc_broadcast_base";
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
};
}; };