diff --git a/Kbuild b/Kbuild index 0bb96dcb..0ae9166a 100644 --- a/Kbuild +++ b/Kbuild @@ -37,6 +37,14 @@ dtbo-y += volcano-qca6750.dtbo dtbo-y += volcano6i-peach-cnss.dtbo endif +ifeq ($(CONFIG_ARCH_TUNA),y) +dtbo-y += tuna-rcm-wcn7750.dtbo +dtbo-y += tuna-cdp-wcn7750.dtbo +dtbo-y += tuna-mtp-wcn7750.dtbo +dtbo-y += tuna-mtp-qmp1000-wcn7750.dtbo +dtbo-y += tuna-qrd-wcn7750.dtbo +endif + always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo diff --git a/tuna-cdp-wcn7750.dts b/tuna-cdp-wcn7750.dts new file mode 100644 index 00000000..429f4fdc --- /dev/null +++ b/tuna-cdp-wcn7750.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-wcn7750.dtsi" + +/ { + + model = "Qualcomm Technologies, Inc. Tuna CDP"; + compatible = "qcom,tuna-cdp", "qcom,tuna", "qcom,cdp"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <1 0>; +}; diff --git a/tuna-mtp-qmp1000-wcn7750.dts b/tuna-mtp-qmp1000-wcn7750.dts new file mode 100644 index 00000000..aca592ef --- /dev/null +++ b/tuna-mtp-qmp1000-wcn7750.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-wcn7750.dtsi" + +/ { + + model = "Qualcomm Technologies, Inc. Tuna MTP QMP1000"; + compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,mtp"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <8 1>; +}; diff --git a/tuna-mtp-wcn7750.dts b/tuna-mtp-wcn7750.dts new file mode 100644 index 00000000..4676d7f0 --- /dev/null +++ b/tuna-mtp-wcn7750.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-wcn7750.dtsi" + +/ { + + model = "Qualcomm Technologies, Inc. Tuna MTP"; + compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,mtp"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <8 0>; +}; diff --git a/tuna-qrd-wcn7750.dts b/tuna-qrd-wcn7750.dts new file mode 100644 index 00000000..dfd9ea29 --- /dev/null +++ b/tuna-qrd-wcn7750.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-wcn7750.dtsi" + +/ { + + model = "Qualcomm Technologies, Inc. Tuna QRD"; + compatible = "qcom,tuna-qrd", "qcom,tuna", "qcom,qrd"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <11 0>; +}; diff --git a/tuna-rcm-wcn7750.dts b/tuna-rcm-wcn7750.dts new file mode 100644 index 00000000..c2796916 --- /dev/null +++ b/tuna-rcm-wcn7750.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "tuna-wcn7750.dtsi" + +/ { + + model = "Qualcomm Technologies, Inc. Tuna RCM"; + compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,rcm"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <21 0>; +}; diff --git a/tuna-wcn7750.dtsi b/tuna-wcn7750.dtsi new file mode 100644 index 00000000..979d3f34 --- /dev/null +++ b/tuna-wcn7750.dtsi @@ -0,0 +1,170 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include + +&soc { + qcom,smp2p-wpss { + smp2p_wlan_1_in: qcom,smp2p-wlan-1-in { + qcom,entry-name = "wlan"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_wlan_1_out: qcom,smp2p-wlan-1-out { + qcom,entry-name = "wlan"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_wlan_2_in: qcom,smp2p-wlan-2-in { + qcom,entry-name = "wlan_soc_wake"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_wlan_2_out: qcom,smp2p-wlan-2-out { + qcom,entry-name = "wlan_soc_wake"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_wlan_3_out: qcom,smp2p-wlan-3-out { + qcom,entry-name = "wlan_ep_power_save"; + #qcom,smem-state-cells = <1>; + }; + }; + + icnss2: qcom,wcn7750 { + compatible = "qcom,wcn7750"; + reg = <0x17110040 0x0>, + <0xc0000000 0x10000>; + reg-names = "msi_addr", "smmu_iova_ipa"; + qcom,rproc-handle = <&wpss_pas>; + iommus = <&apps_smmu 0x1480 0x1>; + wlan-en-gpio =<35>; + host-sol-gpio =<132>; + dev-sol-gpio =<32>; + wlan-sw-ctrl-gpio =<80>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + + qcom,iommu-dma = "fastmap"; + qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal"; + qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>; + qcom,iommu-geometry = <0xb0000000 0x10010000>; + dma-coherent; + qcom,fw-prefix; + qcom,wlan; + tsens = "sys-therm-3"; + qcom,wlan-msa-fixed-region = <&wlan_msa_mem>; + + qcom,smem-states = <&smp2p_wlan_1_out 0>, + <&smp2p_wlan_2_out 0>, + <&smp2p_wlan_3_out 0>; + qcom,smem-state-names = "wlan-smp2p-out", + "wlan-soc-wake-smp2p-out", + "wlan-ep-powersave-smp2p-out"; + + qcom,qmp = <&aoss_qmp>; + qcom,vreg_ol_cpr ="s3b"; + + interconnects = + <&pcie_anoc MASTER_PCIE_0 &pcie_anoc SLAVE_ANOC_PCIE_GEM_NOC>, + <&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>; + interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr"; + + qcom,icc-path-count = <2>; + qcom,bus-bw-cfg-count = <9>; + qcom,bus-bw-cfg = + /** ICC Path 1 **/ + <0 0>, /* no vote */ + /* idle: 0-18 Mbps snoc/anoc: 100 Mhz */ + <2250 1200000>, + /* low: 18-60 Mbps snoc/anoc: 100 Mhz */ + <7500 1200000>, + /* medium: 60-240 Mbps snoc/anoc: 100 Mhz */ + <30000 1200000>, + /* high: 240-1200 Mbps snoc/anoc: 100 Mhz */ + <100000 1200000>, + /* very high: > 1200 Mbps snoc/anoc: 403 Mhz */ + <175000 3224000>, + /* ultra high: DBS mode snoc/anoc: 403 Mhz */ + <312500 3224000>, + /* super high: DBS mode snoc/anoc: 533 Mhz */ + <587500 4264000>, + /* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */ + <7500 1600000>, + + /** ICC Path 2 **/ + <0 0>, + /* idle: 0-18 Mbps ddr: 451.2 MHz */ + <2250 2188800>, + /* low: 18-60 Mbps ddr: 451.2 MHz */ + <7500 2188800>, + /* medium: 60-240 Mbps ddr: 451.2 MHz */ + <30000 2188800>, + /* high: 240-1200 Mbps ddr: 451.2 MHz */ + <100000 2188800>, + /* very high: > 1200 Mbps ddr: 1555 MHz */ + <175000 6220800>, + /* ultra high: DBS mode ddr: 2092 MHz */ + <312500 8368000>, + /* super high: DBS mode ddr: 3.2 GHz */ + <587500 12800000>, + /* low (latency critical): 18-60 Mbps ddr: 451.2 MHz */ + <7500 2188800>; + + icnss_cdev_apss: qcom,icnss_cdev1 { + #cooling-cells = <2>; + }; + + icnss_cdev_wpss: qcom,icnss_cdev2 { + #cooling-cells = <2>; + }; + + qcom,smp2p_map_wlan_1_in { + interrupts-extended = <&smp2p_wlan_1_in 0 0>, + <&smp2p_wlan_1_in 1 0>; + interrupt-names = "qcom,smp2p-force-fatal-error", + "qcom,smp2p-early-crash-ind"; + }; + + qcom,smp2p_map_wlan_2_in { + interrupts-extended = <&smp2p_wlan_2_in 0 0>; + interrupt-names = "qcom,smp2p-soc-wake-ack"; + }; + }; +};