From 53d4aef4041ed7bc5b568387d1f80c8af8dd2f77 Mon Sep 17 00:00:00 2001 From: Abhinav Saurabh Date: Mon, 13 Jan 2025 16:38:12 +0530 Subject: [PATCH] ARM: dts: msm: add support for sharp qhd+ sim panel on Kera Add display support for sharp qhd+ sim panel on Kera. Change-Id: I60283a25c36f9566d7273150551a7eb212cbe001 Signed-off-by: Abhinav Saurabh Signed-off-by: lnxdisplay --- display/kera-sde-display-cdp.dtsi | 18 +++++++++++++++++- display/kera-sde-display-common.dtsi | 28 ++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+), 1 deletion(-) diff --git a/display/kera-sde-display-cdp.dtsi b/display/kera-sde-display-cdp.dtsi index efb7d0d3..48dcca62 100644 --- a/display/kera-sde-display-cdp.dtsi +++ b/display/kera-sde-display-cdp.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "kera-sde-display.dtsi" @@ -135,6 +135,22 @@ qcom,platform-sec-reset-gpio = <&tlmm 127 0>; }; +&dsi_sharp_qhd_plus_dsc_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,platform-reset-gpio = <&tlmm 12 0>; +}; + +&dsi_sharp_qhd_plus_dsc_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,platform-reset-gpio = <&tlmm 12 0>; +}; + &dsi_sim_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; diff --git a/display/kera-sde-display-common.dtsi b/display/kera-sde-display-common.dtsi index 8fec279c..31e0fb61 100644 --- a/display/kera-sde-display-common.dtsi +++ b/display/kera-sde-display-common.dtsi @@ -11,6 +11,8 @@ #include "dsi-panel-sim-dualmipi-dsc375-cmd.dtsi" #include "dsi-panel-sim-dualmipi-video.dtsi" #include "dsi-panel-sim-sec-hd-cmd.dtsi" +#include "dsi-panel-sharp-dsc-qhd-plus-cmd.dtsi" +#include "dsi-panel-sharp-dsc-qhd-plus-video.dtsi" #include "dsi-panel-vtdr6130-dsc-fhd-plus-cmd.dtsi" #include "dsi-panel-vtdr6130-dsc-fhd-plus-video.dtsi" #include "dsi-panel-vtdr6130-dsc-fhd-plus-120hz-cmd.dtsi" @@ -409,6 +411,32 @@ }; }; +&dsi_sharp_qhd_plus_dsc_cmd { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + + qcom,mdss-dsi-display-timings { + timing@0 { /* 120 FPS */ + qcom,mdss-dsi-panel-phy-timings = [00 1a 07 06 16 15 07 + 07 07 02 04 00 17 0c]; + qcom,display-topology = <2 2 2>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_sharp_qhd_plus_dsc_video { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + + qcom,mdss-dsi-display-timings { + timing@0 { /* 120 FPS */ + qcom,mdss-dsi-panel-phy-timings = [00 1a 07 06 16 15 07 + 07 07 02 04 00 17 0c]; + qcom,display-topology = <2 2 2>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_sim_cmd { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";