samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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ARM: dts: msm: Add ipa_hw support for monaco

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Enable IPA HW Accelerator block on monaco.

Change-Id: I4e669ad7333f370b85e3c1e3a815e37b2f338dbb
Signed-off-by: Pavan Kumar M <quic_rpavan@quicinc.com>
This commit is contained in:
Pavan Kumar M
2024-07-03 00:53:07 +05:30
parent 0b4c289667
commit 52b48b023a
4 changed files with 97 additions and 6 deletions
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4
Kbuild
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@@ -27,6 +27,10 @@ ifeq ($(CONFIG_ARCH_PARROT),y)
dtbo-y += parrot-ipa.dtbo
endif
ifeq ($(CONFIG_ARCH_MONACO),y)
dtbo-y += monaco-ipa.dtbo
endif
always-y := $(dtb-y) $(dtbo-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb *.dtbo

6
ipa_v4.dtsi
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@@ -55,12 +55,6 @@
clock-names = "core_clk";
clocks = <&rpmcc RPM_SMD_IPA_CLK>;
qcom,max_num_smmu_cb = <4>;
qcom,interconnect,num-cases = <5>;
qcom,interconnect,num-paths = <3>;
interconnects = <&system_noc MASTER_IPA &bimc SLAVE_EBI>,
<&system_noc MASTER_IPA &system_noc SLAVE_OCIMEM>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_IPA_CFG>;
interconnect-names = "ipa_to_ebi1", "ipa_to_imem", "appss_to_ipa";
/* No vote */
qcom,no-vote =
<0 0 0 0 0 0>;

21
monaco-ipa.dts Normal file
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@@ -0,0 +1,21 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/qcom,ipcc.h>
#include <dt-bindings/interconnect/qcom,monaco.h>
#include <dt-bindings/clock/qcom,gcc-monaco.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include "monaco-ipa.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Monaco";
compatible = "qcom,monaco";
qcom,msm-id = <486 0x10000>;
qcom,board-id = <0 0>;
};

72
monaco-ipa.dtsi Normal file
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@@ -0,0 +1,72 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "ipa_v4.dtsi"
&ipa_hw {
reg = <0x5800000 0x34000>,
<0x5804000 0x28000>;
qcom,ipa-hw-ver = <16>; /* IPA core version = IPAv4.2 */
qcom,use-ipa-pm;
qcom,max_num_smmu_cb = <3>;
qcom,ipa-fltrt-not-hashable;
qcom,skip-ieob-mask-wa;
/delete-property/ qcom,use-64-bit-dma-mask;
/delete-property/ qcom,lan-rx-napi;
/delete-property/ qcom,wan-use-skb-page;
/delete-property/ qcom,rmnet-ctl-enable;
/delete-property/ qcom,tx-wrapper-cache-max-size;
qcom,interconnect,num-cases = <5>;
qcom,interconnect,num-paths = <4>;
interconnects = <&system_noc MASTER_IPA &system_noc SNOC_BIMC_SLV>,
<&bimc SNOC_BIMC_MAS &bimc SLAVE_EBI_CH0>,
<&system_noc MASTER_IPA &system_noc SLAVE_OCIMEM>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_IPA_CFG>;
interconnect-names = "ipa_to_llcc", "llcc_to_ebi1", "ipa_to_imem", "appss_to_ipa";
/* No vote */
qcom,no-vote =
<0 0 0 0 0 0 0 0>;
/* SVS2 */
qcom,svs2 =
<80000 590000 80000 2160000 80000 560000 80000 120000>;
/* SVS */
qcom,svs =
<80000 800000 80000 5414000 80000 920000 80000 180000>;
/* NOMINAL */
qcom,nominal =
<206000 1500000 206000 7200000 206000 1560000 206000 380000>;
/* TURBO */
qcom,turbo =
<206000 1800000 206000 8500000 206000 1880000 206000 520000>;
qcom,bus-vector-names =
"MIN", "SVS2", "SVS", "NOMINAL", "TURBO";
qcom,throughput-threshold = <310 600 1000>;
qcom,scaling-exceptions = <>;
};
&ipa_smmu_ap {
iommus = <&apps_smmu 0x0140 0x0>;
qcom,iommu-dma-addr-pool = <0x10000000 0x30000000>;
qcom,additional-mapping = <0x0c123000 0x0c123000 0x2000>;
qcom,iommu-geometry = <0 0xB0000000>;
/delete-property/ qcom,ipa-q6-smem-size;
};
&ipa_smmu_wlan {
iommus = <&apps_smmu 0x141 0x0>;
};
&ipa_smmu_uc {
iommus = <&apps_smmu 0x0142 0x0>;
qcom,iommu-dma-addr-pool = <0x40400000 0x1fc00000>;
};
/delete-node/ &ipa_smmu_11ad;