dt-bindings: clock: Add clock controller bindings for Parrot

Add clock controller bindings for RPMHCC/GCC/CAMCC/VIDEOCC/DISPCC/GPUCC
on Parrot Platform.

Change-Id: Iaa50f7bf3758ea5fba1fe4249b7b16173320521d
Signed-off-by: Chetan C R <quic_cchinnad@quicinc.com>

bindings/clock/qcom,gcc-parrot.yaml

@@ -0,0 +1,81 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,gcc-parrot.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. Global Clock & Reset Controller
+
+maintainers:
+  - Taniya Das <quic_tdas@quicinc.com>
+
+description: |
+  Global clock control module which supports the clocks, resets and
+  power domains on Parrot.
+
+  See also:
+  - dt-bindings/clock/qcom,gcc-parrot.h
+
+properties:
+  compatible:
+    const: qcom,parrot-gcc
+
+  clocks:
+    items:
+      - description: Board XO source
+      - description: Sleep clock source
+      - description: PCIE 0 Pipe clock source (Optional clock)
+      - description: UFS Phy Rx symbol 0 clock source (Optional clock)
+      - description: UFS Phy Rx symbol 1 clock source (Optional clock)
+      - description: UFS Phy Tx symbol 0 clock source (Optional clock)
+      - description: USB3 Phy wrapper pipe clock source (Optional clock)
+    minItems: 2
+
+  clock-names:
+    items:
+      - const: bi_tcxo
+      - const: sleep_clk
+      - const: pcie_0_pipe_clk # Optional clock
+      - const: ufs_phy_rx_symbol_0_clk # Optional clock
+      - const: ufs_phy_rx_symbol_1_clk # Optional clock
+      - const: ufs_phy_tx_symbol_0_clk # Optional clock
+      - const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock
+    minItems: 2
+
+  vdd_cx-supply:
+    description: Phandle pointer to the vdd_cx logic rail supply
+
+  vdd_mxa-supply:
+    description: Phandle pointer to the vdd_mxa logic rail supply
+
+required:
+  - compatible
+  - clocks
+  - clock-names
+
+allOf:
+  - $ref: "qcom,gcc.yaml#"
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,rpmh.h>
+        gcc: clock-controller@100000 {
+                compatible = "qcom,parrot-gcc", "syscon";
+                reg = <0x100000 0x1f4200>;
+                reg-name = "cc_base";
+                vdd_cx-supply = <&VDD_CX_LEVEL>;
+                vdd_mxa-supply = <&VDD_MXA_LEVEL>;
+                clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>,
+                        <&pcie_0_pipe_clk>, <&ufs_phy_rx_symbol_0_clk>,
+                        <&ufs_phy_rx_symbol_1_clk>, <&ufs_phy_tx_symbol_0_clk>,
+                        <&usb3_phy_wrapper_gcc_usb30_pipe_clk>;
+                clock-names = "bi_tcxo", "sleep_clk",
+                        "pcie_0_pipe_clk", "ufs_phy_rx_symbol_0_clk",
+                        "ufs_phy_rx_symbol_1_clk", "ufs_phy_tx_symbol_0_clk",
+                        "usb3_phy_wrapper_gcc_usb30_pipe_clk";
+                #clock-cells = <1>;
+                #reset-cells = <1>;
+    };
+...