From 4bfa7a3ca5a7ee6cb9de8b6f63a76f0115b99e26 Mon Sep 17 00:00:00 2001
From: Shashikala Katthi <quic_skatthi@quicinc.com>
Date: Fri, 19 Jul 2024 15:18:53 +0530
Subject: [PATCH] ARM: dts: msm: add ufs wrapped key support to ravelin

Add support for ice wrapped keys to the UFS DTSI entry
to ravelin.

Signed-off-by: Shashikala Katthi <quic_skatthi@quicinc.com>
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Change-Id: If34d4b01f607c556b5acb565a7bf2e6f8b5fe551
---
 qcom/ravelin.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/qcom/ravelin.dtsi b/qcom/ravelin.dtsi
index 9c63a0e1..195d7c36 100644
--- a/qcom/ravelin.dtsi
+++ b/qcom/ravelin.dtsi
@@ -1337,14 +1337,14 @@
 	ufshc_mem: ufshc@1d84000 {
 		compatible = "qcom,ufshc";
 		reg = <0x1d84000 0x3000>,
-				<0x1d88000 0x8000>,
-				<0x1d90000 0x9000>;
-		reg-names = "ufs_mem", "ufs_ice", "ufs_ice_hwkm";
+				<0x1d88000 0x18000>;
+		reg-names = "ufs_mem", "ice";
 		interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
 		phys = <&ufsphy_mem>;
 		phy-names = "ufsphy";
 		#reset-cells = <1>;
 
+		qcom,ice-use-hwkm;
 		lanes-per-direction = <2>;
 		dev-ref-clk-freq = <0>; /* 19.2 MHz */
 		clock-names =