diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi
index 86b24ef5..2841131a 100644
--- a/qcom/sun.dtsi
+++ b/qcom/sun.dtsi
@@ -265,6 +265,15 @@
 		};
 	};
 
+	cache-controller@24800000 {
+		compatible = "qcom,sun-llcc";
+		reg = <0x24800000 0x2000000> , <0x26800000 0x200000>;
+		reg-names = "llcc_base", "llcc_broadcast_base";
+		interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+		cap-based-alloc-and-pwr-collapse;
+	};
+
+
 	arch_timer: timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,