From 77b2221d3c7181e31659d73e1396d7fe48f81e82 Mon Sep 17 00:00:00 2001 From: Priyansh Jain Date: Wed, 25 Dec 2024 12:44:26 +0530 Subject: [PATCH 1/3] ARM: dts: qcom: Add cooling cell property for gpu node for kera Add cooling cell property for gpu node for kera. Change-Id: Ic6c313f077c706817958c6941398c7c89aaa58cd Signed-off-by: Priyansh Jain --- qcom/kera-thermal.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/qcom/kera-thermal.dtsi b/qcom/kera-thermal.dtsi index f042a59c..7cc541af 100644 --- a/qcom/kera-thermal.dtsi +++ b/qcom/kera-thermal.dtsi @@ -5,6 +5,10 @@ #include +&msm_gpu { + #cooling-cells = <2>; +}; + &soc { tsens0: tsens0@c228000 { compatible = "qcom,tsens-v2"; @@ -196,6 +200,11 @@ }; }; + qcom,devfreq-cdev { + compatible = "qcom,devfreq-cdev"; + qcom,devfreq = <&msm_gpu>; + }; + qcom,cpufreq-cdev { compatible = "qcom,cpufreq-cdev"; @@ -977,6 +986,13 @@ type = "hot"; }; }; + + cooling-maps { + gpu0_cdev { + trip = <&gpu0_tj_cfg>; + cooling-device = <&msm_gpu 0 THERMAL_NO_LIMIT>; + }; + }; }; gpuss-1 { @@ -1009,6 +1025,13 @@ type = "hot"; }; }; + + cooling-maps { + gpu1_cdev { + trip = <&gpu1_tj_cfg>; + cooling-device = <&msm_gpu 0 THERMAL_NO_LIMIT>; + }; + }; }; video { From 881643c7ebaa6b0fa65a50b4d792ba43524a3a24 Mon Sep 17 00:00:00 2001 From: songchai Date: Thu, 19 Dec 2024 22:42:56 -0800 Subject: [PATCH 2/3] ARM: dts: msm: correct apss-tpda's element size correct apss-tpda's element size for kera. Change-Id: I39218beffeee8cc70d46a4f427bf5805a2e1b63c Signed-off-by: songchai --- qcom/kera-coresight.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/qcom/kera-coresight.dtsi b/qcom/kera-coresight.dtsi index 0a23fa78..fe148e22 100644 --- a/qcom/kera-coresight.dtsi +++ b/qcom/kera-coresight.dtsi @@ -922,8 +922,12 @@ coresight-name = "coresight-tpda-apss"; + qcom,dsb-elem-size = <2 32>, + <8 32>; + qcom,cmb-elem-size = <0 32>, - <1 32>; + <1 32>, + <6 64>; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; From bde61842c663c00725b1915c2abbaf968826f77e Mon Sep 17 00:00:00 2001 From: songchai Date: Mon, 16 Dec 2024 22:00:51 -0800 Subject: [PATCH 3/3] ARM: dts: msm: correct tpdms'name for kera correct tpdms'name for kera. Change-Id: Id5ce09d1ba9389594826c511d3fdf200f83724c1 Signed-off-by: songchai --- qcom/kera-coresight.dtsi | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/qcom/kera-coresight.dtsi b/qcom/kera-coresight.dtsi index fe148e22..6570b640 100644 --- a/qcom/kera-coresight.dtsi +++ b/qcom/kera-coresight.dtsi @@ -1823,10 +1823,10 @@ }; }; - tpdm_lpass_crdl: tpdm@10bb4000 { + tpdm_lpass_crdl: tpdm@10b84000 { compatible = "arm,primecell"; arm,primecell-periphid = <0x000bb968>; - reg = <0x10bb4000 0x1000>; + reg = <0x10b84000 0x1000>; reg-names = "tpdm-base"; coresight-name = "coresight-tpdm-lpass-crdl"; @@ -2883,7 +2883,7 @@ reg = <0x10820000 0x1000>; reg-names = "tpdm-base"; - coresight-name = "coresight-dlct-dsb"; + coresight-name = "coresight-tpdm-dlct-dsb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -2905,7 +2905,7 @@ reg = <0x10821000 0x1000>; reg-names = "tpdm-base"; - coresight-name = "coresight-dlct-cmb"; + coresight-name = "coresight-tpdm-dlct-cmb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -3107,7 +3107,7 @@ reg = <0x109a4000 0x1000>; reg-names = "tpdm-base"; - coresight-name = "coresight-mm-dsb"; + coresight-name = "coresight-tpdm-mm-dsb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -3130,7 +3130,7 @@ reg = <0x109ae000 0x1000>; reg-names = "tpdm-base"; - coresight-name = "coresight-west-dsb"; + coresight-name = "coresight-tpdm-west-dsb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -3153,7 +3153,7 @@ reg = <0x109a5000 0x1000>; reg-names = "tpdm-base"; - coresight-name = "coresight-south-dsb"; + coresight-name = "coresight-tpdm-south-dsb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -3174,7 +3174,7 @@ reg = <0x109ab000 0x1000>; reg-names = "tpdm-base"; - coresight-name = "coresight-ipcc-cmb"; + coresight-name = "coresight-tpdm-ipcc-cmb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -3196,7 +3196,7 @@ reg = <0x109aa000 0x1000>; reg-names = "tpdm-base"; - coresight-name = "coresight-center-dsb"; + coresight-name = "coresight-tpdm-center-dsb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -3218,7 +3218,7 @@ reg = <0x109a7000 0x1000>; reg-names = "tpdm-base"; - coresight-name = "coresight-rdpm-cx"; + coresight-name = "coresight-tpdm-rdpm-cx"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -3240,7 +3240,7 @@ reg = <0x109a9000 0x1000>; reg-names = "tpdm-base"; - coresight-name = "coresight-rdpm-mxc"; + coresight-name = "coresight-tpdm-rdpm-mxc"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -3262,7 +3262,7 @@ reg = <0x109a8000 0x1000>; reg-names = "tpdm-base"; - coresight-name = "coresight-rdpm-mxa"; + coresight-name = "coresight-tpdm-rdpm-mxa"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -3284,7 +3284,7 @@ reg = <0x109ac000 0x1000>; reg-names = "tpdm-base"; - coresight-name = "coresight-center-cmb"; + coresight-name = "coresight-tpdm-center-cmb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk"; @@ -3306,7 +3306,7 @@ reg = <0x109af000 0x1000>; reg-names = "tpdm-base"; - coresight-name = "coresight-south-cmb"; + coresight-name = "coresight-tpdm-south-cmb"; clocks = <&aoss_qmp>; clock-names = "apb_pclk";