Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0

CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3805307           I43800260 ARM: dts: msm: add sde_rscc register offset to cesta for sun target

CRs-Included: 3805307 .

Change-Id: If59f5f44c7333e1628ccb9d761b637f5910e21b8
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
This commit is contained in:
lnxdisplay
2024-07-11 00:07:41 +05:30
2 changed files with 5 additions and 3 deletions

View File

@@ -210,14 +210,15 @@
sde_cesta: qcom,sde_cesta@0x0af30000 {
cell-index = <0>;
compatible = "qcom,sde-cesta";
reg = <0xaf30000 0x60>,
reg = <0x0af20000 0x850>,
<0xaf30000 0x60>,
<0xaf31000 0x30>,
<0xaf32000 0x30>,
<0xaf33000 0x30>,
<0xaf34000 0x30>,
<0xaf35000 0x30>,
<0xaf36000 0x30>;
reg-names = "wrapper", "scc_0", "scc_1", "scc_2", "scc_3", "scc_4", "scc_5";
reg-names = "rscc", "wrapper", "scc_0", "scc_1", "scc_2", "scc_3", "scc_4", "scc_5";
clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK_SRC>;

View File

@@ -37,7 +37,8 @@
qcom,sde-vm-exclude-reg-names = "sid_phys";
qcom,tvm-include-reg = <0xaf30000 0x60>,
qcom,tvm-include-reg = <0x0af20000 0x850>,
<0xaf30000 0x60>,
<0xaf31000 0x30>,
<0xaf32000 0x30>,
<0xaf33000 0x30>,