From 46f32bb8da40faa0dec33c3a86994e9dce85eaa6 Mon Sep 17 00:00:00 2001 From: Yahui Wang Date: Fri, 24 Nov 2023 20:33:32 +0800 Subject: [PATCH] ARM: dts: msm: enable dp hdcp/pll/audio codec for sun Enable dp hdcp/pll/audio codec for sun. Change-Id: Ibdc94b27e4b8d1cb558656c9374d18b7b6266460 Signed-off-by: Yahui Wang --- display/sun-sde.dtsi | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi index 29d03668..a79a31a8 100644 --- a/display/sun-sde.dtsi +++ b/display/sun-sde.dtsi @@ -14,16 +14,30 @@ &soc { ext_disp: qcom,msm-ext-disp { compatible = "qcom,msm-ext-disp"; + + ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx { + compatible = "qcom,msm-ext-disp-audio-codec-rx"; + }; + }; + + qcom_msmhdcp: qcom,msm_hdcp { + compatible = "qcom,msm-hdcp"; + }; + + sde_dp_pll: qcom,dp_pll@88eb000 { + compatible = "qcom,dp-pll-3nm-v1"; + #clock-cells = <1>; }; sde_dp: qcom,dp_display@af54000 { - status = "disabled"; cell-index = <0>; compatible = "qcom,dp-display"; usb-phy = <&usb_qmp_dp_phy>; qcom,ext-disp = <&ext_disp>; usb-controller = <&usb0>; + qcom,altmode-dev = <&altmode 0>; + qcom,dp-aux-switch = <&wcd_usbss>; reg = <0xaf54000 0x104>, <0xaf54200 0x0c0>, @@ -52,10 +66,10 @@ <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>, <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>, - <&sde_dp 0>, + <&sde_dp_pll 0>, <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>, <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>, - <&sde_dp 1>, + <&sde_dp_pll 1>, <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC>, <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>, <&dispcc DISP_CC_MDSS_DPTX0_PIXEL1_CLK>; @@ -64,7 +78,7 @@ "link_iface_clk", "pixel_clk_rcg", "pixel_parent", "pixel1_clk_rcg", "strm0_pixel_clk", "strm1_pixel_clk"; - qcom,pll-revision = "3nm-v1"; + qcom,dp-pll = <&sde_dp_pll>; qcom,phy-version = <0x800>; qcom,aux-cfg0-settings = [20 00]; qcom,aux-cfg1-settings = [24 13];