From 44378f46da41f03ab5e561ee06e41a9cd3a2c3f1 Mon Sep 17 00:00:00 2001
From: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Date: Wed, 3 Jan 2024 09:01:26 -0800
Subject: [PATCH] ARM: dts: msm: Add LLCC broadacst register mappings

Add mappings for LLCC Broadcast_OR, Broadcast_AND regions.

Change-Id: I1f6e55ec2acb6857c8473849847bd3b10e5d7697
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
---
 qcom/sun.dtsi | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi
index dfac7c37..a6c52374 100644
--- a/qcom/sun.dtsi
+++ b/qcom/sun.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <dt-bindings/clock/qcom,rpmh.h>
@@ -841,9 +841,10 @@
 		compatible = "qcom,sun-llcc";
 		reg = <0x24800000 0x200000>, <0x25800000 0x200000>,
 			<0x24C00000 0x200000>, <0x25C00000 0x200000>,
-			<0x26800000 0x200000>;
+			<0x26800000 0x200000>, <0x26C00000 0x200000>;
 		reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
-			"llcc3_base", "llcc_broadcast_base";
+			"llcc3_base", "llcc_broadcast_or_base",
+			"llcc_broadcast_and_base";
 		interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
 		cap-based-alloc-and-pwr-collapse;