samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ARM: dts: qcom: Add CPU hotplug and pause cooling device for sun

Browse Source 
Add CPU hotplug and pause cooling device to hotplug or pause any
CPU under thermal conditions on sun. Added the respective pause and
hotplug cooling maps to the CPUs and added cooling-cells property for
each CPU.

Change-Id: I6753ee0d77511d58ba313707381f2e0b9114eeed
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
This commit is contained in:
Rashid Zafar
2023-11-06 18:12:14 -08:00
parent 56b0c9980a
commit 42bffb9d18
2 changed files with 350 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

342
qcom/sun-thermal.dtsi
View File

@@ -54,6 +54,156 @@
#thermal-sensor-cells = <1>;
};
qcom,cpu-pause {
compatible = "qcom,thermal-pause";
cpu0_pause: cpu0-pause {
qcom,cpus = <&CPU0>;
#cooling-cells = <2>;
};
cpu1_pause: cpu1-pause {
qcom,cpus = <&CPU1>;
#cooling-cells = <2>;
};
cpu2_pause: cpu2-pause {
qcom,cpus = <&CPU2>;
#cooling-cells = <2>;
};
cpu3_pause: cpu3-pause {
qcom,cpus = <&CPU3>;
#cooling-cells = <2>;
};
cpu4_pause: cpu4-pause {
qcom,cpus = <&CPU4>;
#cooling-cells = <2>;
};
cpu5_pause: cpu5-pause {
qcom,cpus = <&CPU5>;
#cooling-cells = <2>;
};
cpu6_pause: cpu6-pause {
qcom,cpus = <&CPU6>;
#cooling-cells = <2>;
};
cpu7_pause: cpu7-pause {
qcom,cpus = <&CPU7>;
#cooling-cells = <2>;
};
//TODO: what about core 0, we can't pause all?
APC0_MX_CX_PAUSE: apc0-mx-cx-pause {
qcom,cpus = <&CPU1 &CPU2 &CPU3 &CPU4 &CPU5>;
#cooling-cells = <2>;
};
APC1_MX_CX_PAUSE: apc1-mx-cx-pause {
qcom,cpus = <&CPU6 &CPU7>;
#cooling-cells = <2>;
};
cpu_1_2_3_4_5_pause: cpu-1-2-3-4-5-pause {
qcom,cpus = <&CPU1 &CPU2 &CPU3 &CPU4 &CPU5>;
#cooling-cells = <2>;
};
cpu_6_7_pause: cpu-6-7-pause {
qcom,cpus = <&CPU6 &CPU7>;
#cooling-cells = <2>;
};
/* Thermal-engine cooling devices */
pause-cpu0 {
qcom,cpus = <&CPU0>;
qcom,cdev-alias = "pause-cpu0";
};
pause-cpu1 {
qcom,cpus = <&CPU1>;
qcom,cdev-alias = "pause-cpu1";
};
pause-cpu2 {
qcom,cpus = <&CPU2>;
qcom,cdev-alias = "pause-cpu2";
};
pause-cpu3 {
qcom,cpus = <&CPU3>;
qcom,cdev-alias = "pause-cpu3";
};
pause-cpu4 {
qcom,cpus = <&CPU4>;
qcom,cdev-alias = "pause-cpu4";
};
pause-cpu5 {
qcom,cpus = <&CPU5>;
qcom,cdev-alias = "pause-cpu5";
};
pause-cpu6 {
qcom,cpus = <&CPU6>;
qcom,cdev-alias = "pause-cpu6";
};
pause-cpu7 {
qcom,cpus = <&CPU7>;
qcom,cdev-alias = "pause-cpu7";
};
};
qcom,cpu-hotplug {
compatible = "qcom,cpu-hotplug";
cpu0_hotplug: cpu0-hotplug {
qcom,cpu = <&CPU0>;
#cooling-cells = <2>;
};
cpu1_hotplug: cpu1-hotplug {
qcom,cpu = <&CPU1>;
#cooling-cells = <2>;
};
cpu2_hotplug: cpu2-hotplug {
qcom,cpu = <&CPU2>;
#cooling-cells = <2>;
};
cpu3_hotplug: cpu3-hotplug {
qcom,cpu = <&CPU3>;
#cooling-cells = <2>;
};
cpu4_hotplug: cpu4-hotplug {
qcom,cpu = <&CPU4>;
#cooling-cells = <2>;
};
cpu5_hotplug: cpu5-hotplug {
qcom,cpu = <&CPU5>;
#cooling-cells = <2>;
};
cpu6_hotplug: cpu6-hotplug {
qcom,cpu = <&CPU6>;
#cooling-cells = <2>;
};
cpu7_hotplug: cpu7-hotplug {
qcom,cpu = <&CPU7>;
#cooling-cells = <2>;
};
};
qcom,devfreq-cdev {
compatible = "qcom,devfreq-cdev";
qcom,devfreq = <&msm_gpu>;
@@ -115,6 +265,18 @@
type = "passive";
};
};
cooling-maps {
cpu000_cdev {
trip = <&cpu0_emerg0>;
cooling-device = <&cpu0_pause 1 1>;
};
cpu000_cdev1 {
trip = <&cpu0_emerg0_1>;
cooling-device = <&cpu0_hotplug 1 1>;
};
};
};
cpu-0-0-1 {
@@ -152,6 +314,18 @@
type = "passive";
};
};
cooling-maps {
cpu001_cdev {
trip = <&cpu0_emerg1>;
cooling-device = <&cpu0_pause 1 1>;
};
cpu001_cdev1 {
trip = <&cpu0_emerg1_1>;
cooling-device = <&cpu0_hotplug 1 1>;
};
};
};
cpu-0-1-0 {
@@ -189,6 +363,18 @@
type = "passive";
};
};
cooling-maps {
cpu010_cdev {
trip = <&cpu1_emerg0>;
cooling-device = <&cpu1_pause 1 1>;
};
cpu010_cdev1 {
trip = <&cpu1_emerg0_1>;
cooling-device = <&cpu1_hotplug 1 1>;
};
};
};
cpu-0-1-1 {
@@ -226,6 +412,18 @@
type = "passive";
};
};
cooling-maps {
cpu011_cdev {
trip = <&cpu1_emerg1>;
cooling-device = <&cpu1_pause 1 1>;
};
cpu011_cdev1 {
trip = <&cpu1_emerg1_1>;
cooling-device = <&cpu1_hotplug 1 1>;
};
};
};
cpu-0-2-0 {
@@ -263,6 +461,18 @@
type = "passive";
};
};
cooling-maps {
cpu020_cdev {
trip = <&cpu2_emerg0>;
cooling-device = <&cpu2_pause 1 1>;
};
cpu020_cdev1 {
trip = <&cpu2_emerg0_1>;
cooling-device = <&cpu2_hotplug 1 1>;
};
};
};
cpu-0-2-1 {
@@ -300,6 +510,18 @@
type = "passive";
};
};
cooling-maps {
cpu021_cdev {
trip = <&cpu2_emerg1>;
cooling-device = <&cpu2_pause 1 1>;
};
cpu021_cdev1 {
trip = <&cpu2_emerg1_1>;
cooling-device = <&cpu2_hotplug 1 1>;
};
};
};
cpu-0-3-0 {
@@ -337,6 +559,18 @@
type = "passive";
};
};
cooling-maps {
cpu030_cdev {
trip = <&cpu3_emerg0>;
cooling-device = <&cpu3_pause 1 1>;
};
cpu030_cdev1 {
trip = <&cpu3_emerg0_1>;
cooling-device = <&cpu3_hotplug 1 1>;
};
};
};
cpu-0-3-1 {
@@ -374,6 +608,18 @@
type = "passive";
};
};
cooling-maps {
cpu031_cdev {
trip = <&cpu3_emerg1>;
cooling-device = <&cpu3_pause 1 1>;
};
cpu031_cdev1 {
trip = <&cpu3_emerg1_1>;
cooling-device = <&cpu3_hotplug 1 1>;
};
};
};
cpu-0-4-0 {
@@ -411,6 +657,18 @@
type = "passive";
};
};
cooling-maps {
cpu040_cdev {
trip = <&cpu4_emerg0>;
cooling-device = <&cpu4_pause 1 1>;
};
cpu040_cdev1 {
trip = <&cpu4_emerg0_1>;
cooling-device = <&cpu4_hotplug 1 1>;
};
};
};
cpu-0-4-1 {
@@ -448,6 +706,18 @@
type = "passive";
};
};
cooling-maps {
cpu041_cdev {
trip = <&cpu4_emerg1>;
cooling-device = <&cpu4_pause 1 1>;
};
cpu041_cdev1 {
trip = <&cpu4_emerg1_1>;
cooling-device = <&cpu4_hotplug 1 1>;
};
};
};
cpu-0-5-0 {
@@ -485,6 +755,18 @@
type = "passive";
};
};
cooling-maps {
cpu050_cdev {
trip = <&cpu5_emerg0>;
cooling-device = <&cpu5_pause 1 1>;
};
cpu050_cdev1 {
trip = <&cpu5_emerg0_1>;
cooling-device = <&cpu5_hotplug 1 1>;
};
};
};
cpu-0-5-1 {
@@ -522,6 +804,18 @@
type = "passive";
};
};
cooling-maps {
cpu051_cdev {
trip = <&cpu5_emerg1>;
cooling-device = <&cpu5_pause 1 1>;
};
cpu051_cdev1 {
trip = <&cpu5_emerg1_1>;
cooling-device = <&cpu5_hotplug 1 1>;
};
};
};
cpuss-0-0 {
@@ -616,6 +910,18 @@
type = "passive";
};
};
cooling-maps {
cpu100_cdev {
trip = <&cpu6_emerg0>;
cooling-device = <&cpu6_pause 1 1>;
};
cpu100_cdev1 {
trip = <&cpu6_emerg0_1>;
cooling-device = <&cpu6_hotplug 1 1>;
};
};
};
cpu-1-0-1 {
@@ -653,6 +959,18 @@
type = "passive";
};
};
cooling-maps {
cpu101_cdev {
trip = <&cpu6_emerg1>;
cooling-device = <&cpu6_pause 1 1>;
};
cpu101_cdev1 {
trip = <&cpu6_emerg1_1>;
cooling-device = <&cpu6_hotplug 1 1>;
};
};
};
cpu-1-1-0 {
@@ -690,6 +1008,18 @@
type = "passive";
};
};
cooling-maps {
cpu110_cdev {
trip = <&cpu7_emerg0>;
cooling-device = <&cpu7_pause 1 1>;
};
cpu110_cdev1 {
trip = <&cpu7_emerg0_1>;
cooling-device = <&cpu7_hotplug 1 1>;
};
};
};
cpu-1-1-1 {
@@ -727,6 +1057,18 @@
type = "passive";
};
};
cooling-maps {
cpu111_cdev {
trip = <&cpu7_emerg1>;
cooling-device = <&cpu7_pause 1 1>;
};
cpu111_cdev1 {
trip = <&cpu7_emerg1_1>;
cooling-device = <&cpu7_hotplug 1 1>;
};
};
};
cpuss-1-0 {

8
qcom/sun.dtsi
View File

@@ -59,6 +59,7 @@
cpu-idle-states = <&MEDIUM_OFF_C4>;
power-domains = <&CPU_PD0>;
power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
compatible = "arm,arch-cache";
@@ -74,6 +75,7 @@
cpu-idle-states = <&MEDIUM_OFF_C4>;
power-domains = <&CPU_PD1>;
power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
};
@@ -85,6 +87,7 @@
cpu-idle-states = <&MEDIUM_OFF_C4>;
power-domains = <&CPU_PD2>;
power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
};
@@ -96,6 +99,7 @@
cpu-idle-states = <&MEDIUM_OFF_C4>;
power-domains = <&CPU_PD3>;
power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
};
@@ -107,6 +111,7 @@
cpu-idle-states = <&MEDIUM_OFF_C4>;
power-domains = <&CPU_PD4>;
power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
};
@@ -118,6 +123,7 @@
cpu-idle-states = <&MEDIUM_OFF_C4>;
power-domains = <&CPU_PD5>;
power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
};
@@ -129,6 +135,7 @@
cpu-idle-states = <&LARGE_OFF_C4>;
power-domains = <&CPU_PD6>;
power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_6>;
L2_6: l2-cache {
compatible = "arm,arch-cache";
@@ -144,6 +151,7 @@
cpu-idle-states = <&LARGE_OFF_C4>;
power-domains = <&CPU_PD7>;
power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_6>;
};