From 404e2df2ce687a105d2265db8e74bb3b730be6c3 Mon Sep 17 00:00:00 2001
From: Maulik Shah <quic_mkshah@quicinc.com>
Date: Thu, 23 May 2024 17:00:26 +0530
Subject: [PATCH] ARM: dts: msm: Add CRMB_PT reg for sun

CRMB_PT is used to dump TCS and FSM status.

Change-Id: Ic5e72f8db923a3d009ecc25cdbe193401f7af091
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
---
 qcom/sun.dtsi | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi
index ad1704e8..6e3f5fe7 100644
--- a/qcom/sun.dtsi
+++ b/qcom/sun.dtsi
@@ -1328,9 +1328,9 @@
 	disp_crm: crm@af21000 {
 		label = "disp_crm";
 		compatible = "qcom,disp-crm-v2";
-		reg = <0xaf21000 0x6000>, <0xaf27000 0x400>, <0xaf27800 0x2000>,
-		      <0xaf29800 0x700>, <0xaf29f00 0x100>;
-		reg-names = "base", "crm_b", "crm_c", "crm_v", "common";
+		reg = <0xaf21000 0x6000>, <0xaf27000 0x400>, <0xaf27400 0x400>,
+		      <0xaf27800 0x2000>, <0xaf29800 0x700>, <0xaf29f00 0x100>;
+		reg-names = "base", "crm_b", "crm_b_pt", "crm_c", "crm_v", "common";
 		interrupts = <GIC_SPI 703 IRQ_TYPE_EDGE_RISING>,
 			     <GIC_SPI 708 IRQ_TYPE_EDGE_RISING>,
 			     <GIC_SPI 714 IRQ_TYPE_EDGE_RISING>,
@@ -1351,9 +1351,9 @@
 	cam_crm: crm@adcb000 {
 		label = "cam_crm";
 		compatible = "qcom,cam-crm-v2";
-		reg = <0xadcb000 0x1e00>, <0xadcce00 0x400>, <0xadcd600 0x2000>,
-		      <0xadcf600 0x700>, <0xadcfd00 0x100>;
-		reg-names = "base", "crm_b", "crm_c", "crm_v", "common";
+		reg = <0xadcb000 0x1e00>, <0xadcce00 0x400>, <0xadcd200 0x400>,
+		      <0xadcd600 0x2000>, <0xadcf600 0x700>, <0xadcfd00 0x100>;
+		reg-names = "base", "crm_b", "crm_b_pt", "crm_c", "crm_v", "common";
 		interrupts = <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>;
 		interrupt-names = "cam_crm_drv0";
 		clocks = <&camcc CAM_CC_DRV_AHB_CLK>;
@@ -1364,9 +1364,9 @@
 	pcie_crm: crm@1d01000 {
 		label = "pcie_crm";
 		compatible = "qcom,pcie-crm-v2";
-		reg = <0x1d01000 0x2000>, <0x1d03000 0x400>, <0x1d03800 0x2000>,
-		      <0x1d05800 0x700>, <0x1d05f00 0x100>;
-		reg-names = "base", "crm_b", "crm_c", "crm_v", "common";
+		reg = <0x1d01000 0x2000>, <0x1d03000 0x400>, <0x1d03400 0x400>,
+		      <0x1d03800 0x2000>, <0x1d05800 0x700>, <0x1d05f00 0x100>;
+		reg-names = "base", "crm_b", "crm_b_pt", "crm_c", "crm_v", "common";
 		interrupts = <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>;
 		interrupt-names = "pcie_crm_drv0";
 		clocks = <&pcie_0_pipe_clk>;