samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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Merge changes I24a255e4,I1ba1c06c,Ife534f2d,Ie5912e46,I2eac0326, ... into kernel.lnx.6.6.r1-rel

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* changes:
  ARM: dts: msm: Passing usb_qmp_dp_phy string to enable SS on tuna
  ARM: dts: msm: Update card detection pin for tuna
  ARM: dts: msm: Add MPAM,NOC BW MPAM node for Tuna
  ARM: dts: msm: Add soccp node for Tuna
  bindings: remoteproc: Add soccp remoteproc binding for Tuna
  ARM: dts: msm: Add i2c gpio access to apps and adsp on Tuna
  ARM: dts: msm: Add eUSB2 repeater nodes for Tuna MTP
  ARM: dts: msm: Add pin configuration for USB3 PHY portselect on Tuna
This commit is contained in:
Linux Build Service Account
2024-11-24 04:47:20 -08:00
committed by Gerrit - the friendly Code Review server
parent 116baf16d2 a79fc2d51e
commit 3e71ac3552
9 changed files with 127 additions and 7 deletions
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1
bindings/remoteproc/qcom,adsp.yaml
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@@ -66,6 +66,7 @@ properties:
- qcom,tuna-adsp-pas
- qcom,tuna-cdsp-pas
- qcom,tuna-modem-pas
- qcom,tuna-soccp-pas
- qcom,parrot-adsp-pas
- qcom,parrot-cdsp-pas
- qcom,parrot-modem-pas

2
qcom/tuna-cdp.dtsi
View File

@@ -99,7 +99,7 @@
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>;
cd-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
qcom,uses_level_shifter;

2
qcom/tuna-mtp.dtsi
View File

@@ -101,7 +101,7 @@
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>;
cd-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
qcom,uses_level_shifter;

30
qcom/tuna-pinctrl.dtsi
View File

@@ -1096,6 +1096,7 @@
drive-strength = <2>;
bias-pull-up;
qcom,i2c_pull;
qcom,apps;
};
};
@@ -1110,6 +1111,7 @@
drive-strength = <2>;
bias-pull-up;
qcom,i2c_pull;
qcom,apps;
};
};
@@ -1122,6 +1124,7 @@
config {
pins = "gpio0", "gpio1";
drive-strength = <2>;
qcom,remote;
};
};
};
@@ -1969,7 +1972,34 @@
drive-strength = <2>;
};
};
usb_phy_ps: usb_phy_ps {
usb3phy_portselect_default: usb3phy_portselect_default {
mux {
pins = "gpio122";
function = "usb0_phy_ps";
};
config {
pins = "gpio122";
bias-pull-down;
drive-strength = <2>;
};
};
usb3phy_portselect_gpio: usb3phy_portselect_gpio {
mux {
pins = "gpio122";
function = "gpio";
};
config {
pins = "gpio122";
drive-strength = <2>;
bias-pull-down;
input-enable;
};
};
};
/* touchscreen pins */
pmx_ts_active {
ts_active: ts_active {

11
qcom/tuna-pm7550ba.dtsi
View File

@@ -259,3 +259,14 @@
};
};
};
&pm7550ba_eusb2_repeater {
vdd18-supply = <&L7B>;
vdd3-supply = <&L17B>;
status = "ok";
};
&eusb2_phy0 {
dummy-supply = <&pm7550ba_eusb2_repeater>;
usb-repeater = <&pm7550ba_eusb2_repeater>;
};

2
qcom/tuna-qrd.dtsi
View File

@@ -111,7 +111,7 @@
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>;
cd-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
qcom,uses_level_shifter;

4
qcom/tuna-qupv3.dtsi
View File

@@ -466,8 +466,8 @@
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se8_i2c_sda_active>, <&qupv3_se8_i2c_scl_active>;
pinctrl-1 = <&qupv3_se8_i2c_sleep>;
dmas = <&gpi_dma2 0 0 3 64 0>,
<&gpi_dma2 1 0 3 64 0>;
dmas = <&gpi_dma2 0 0 3 1024 0>,
<&gpi_dma2 1 0 3 1024 0>;
dma-names = "tx", "rx";
status = "disabled";
};

5
qcom/tuna-usb.dtsi
View File

@@ -76,7 +76,7 @@
dma-coherent;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&eusb2_phy0>, <&usb_nop_phy>;
usb-phy = <&eusb2_phy0>, <&usb_qmp_dp_phy>;
snps,disable-clk-gating;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x0>;
@@ -152,6 +152,9 @@
<&gcc GCC_USB3_PHY_PRIM_BCR>;
reset-names = "global_phy_reset", "phy_reset";
pinctrl-names = "default";
pinctrl-0 = <&usb3phy_portselect_default>;
qcom,qmp-phy-reg-offset =
<USB3_DP_PCS_PCS_STATUS1
USB3_DP_PCS_USB3_AUTONOMOUS_MODE_CTRL

77
qcom/tuna.dtsi
View File

@@ -1204,6 +1204,43 @@
};
};
soccp_pas: remoteproc-soccp@a3380000 {
compatible = "qcom,tuna-soccp-pas";
reg = <0xa3380000 0x10000>;
status = "ok";
cx-supply = <&VDD_CX_LEVEL>;
cx-uV-uA = <RPMH_REGULATOR_LEVEL_LOW_SVS 0>;
mx-supply = <&VDD_MX_LEVEL>;
mx-uV-uA = <RPMH_REGULATOR_LEVEL_LOW_SVS 0>;
reg-names = "cx", "mx";
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
memory-region = <&soccp_mem 0>;
soccp-config = <&tcsr 0x1a000>;
/* Inputs from SOCCP */
interrupts-extended = <&intc GIC_SPI 167 IRQ_TYPE_EDGE_RISING>,
<&soccp_smp2p_in 0 0>,
<&soccp_smp2p_in 1 0>,
<&soccp_smp2p_in 3 0>,
<&soccp_smp2p_in 2 0>,
<&soccp_smp2p_in 9 0>;
interrupt-names = "wdog",
"fatal",
"ready",
"stop-ack",
"handover",
"pong";
/* Outputs to soccp */
qcom,smem-states = <&soccp_smp2p_out 0>, <&soccp_smp2p_out 10>, <&soccp_smp2p_out 9>;
qcom,smem-state-names = "stop", "wakeup", "sleep";
};
sys-pm-vx@c320000 {
compatible = "qcom,sys-pm-violators", "qcom,sys-pm-tuna";
reg = <0xc320000 0x400>;
@@ -2198,7 +2235,7 @@
dma-coherent;
memory-region = <&sdhc_2_dma_resv>;
interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
interconnects = <&aggre1_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;
interconnect-names = "sdhc-ddr","cpu-sdhc";
operating-points-v2 = <&sdhc2_opp_table>;
@@ -2839,6 +2876,44 @@
compatible = "qcom,cpufreq-stats-v2";
};
qcom_mpam: qcom,mpam {
compatible = "qcom,mpam";
};
cpu_mpam: qcom,cpu_mpam {
compatible = "qcom,cpu-mpam";
L3 {
qcom,msc-id = <0>;
qcom,msc-name = "L3";
};
};
noc_bw_mpam: qcom,noc_bw_mpam {
compatible = "qcom,platform-mpam";
reg = <0x17D2EC00 0x400>;
reg-names = "mon-base";
qcom,msc-id = <3>;
qcom,msc-name = "noc_bw";
qcom,gears = "low", "medium", "high", "veryhigh";
qcom,gear-id = <1>, <2>, <3>, <4>;
cpu {
qcom,client-id = <0x1>;
qcom,client-name = "cpu";
};
gpu {
qcom,client-id = <0x10>;
qcom,client-name = "gpu";
};
nsp {
qcom,client-id = <0x100>;
qcom,client-name = "nsp";
};
};
llcc_pmu: llcc-pmu@24095000 {
compatible = "qcom,llcc-pmu-ver2";
reg = <0x24095000 0x300>;