Merge changes I24a255e4,I1ba1c06c,Ife534f2d,Ie5912e46,I2eac0326, ... into kernel.lnx.6.6.r1-rel
* changes: ARM: dts: msm: Passing usb_qmp_dp_phy string to enable SS on tuna ARM: dts: msm: Update card detection pin for tuna ARM: dts: msm: Add MPAM,NOC BW MPAM node for Tuna ARM: dts: msm: Add soccp node for Tuna bindings: remoteproc: Add soccp remoteproc binding for Tuna ARM: dts: msm: Add i2c gpio access to apps and adsp on Tuna ARM: dts: msm: Add eUSB2 repeater nodes for Tuna MTP ARM: dts: msm: Add pin configuration for USB3 PHY portselect on Tuna
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3e71ac3552
@@ -66,6 +66,7 @@ properties:
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- qcom,tuna-adsp-pas
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- qcom,tuna-adsp-pas
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- qcom,tuna-cdsp-pas
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- qcom,tuna-cdsp-pas
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- qcom,tuna-modem-pas
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- qcom,tuna-modem-pas
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- qcom,tuna-soccp-pas
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- qcom,parrot-adsp-pas
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- qcom,parrot-adsp-pas
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- qcom,parrot-cdsp-pas
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- qcom,parrot-cdsp-pas
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- qcom,parrot-modem-pas
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- qcom,parrot-modem-pas
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@@ -99,7 +99,7 @@
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pinctrl-0 = <&sdc2_on>;
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pinctrl-0 = <&sdc2_on>;
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pinctrl-1 = <&sdc2_off>;
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pinctrl-1 = <&sdc2_off>;
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cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>;
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cd-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
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qcom,uses_level_shifter;
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qcom,uses_level_shifter;
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@@ -101,7 +101,7 @@
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pinctrl-0 = <&sdc2_on>;
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pinctrl-0 = <&sdc2_on>;
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pinctrl-1 = <&sdc2_off>;
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pinctrl-1 = <&sdc2_off>;
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cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>;
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cd-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
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qcom,uses_level_shifter;
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qcom,uses_level_shifter;
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@@ -1096,6 +1096,7 @@
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drive-strength = <2>;
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drive-strength = <2>;
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bias-pull-up;
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bias-pull-up;
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qcom,i2c_pull;
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qcom,i2c_pull;
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qcom,apps;
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};
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};
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};
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};
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@@ -1110,6 +1111,7 @@
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drive-strength = <2>;
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drive-strength = <2>;
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bias-pull-up;
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bias-pull-up;
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qcom,i2c_pull;
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qcom,i2c_pull;
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qcom,apps;
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};
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};
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};
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};
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@@ -1122,6 +1124,7 @@
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config {
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config {
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pins = "gpio0", "gpio1";
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pins = "gpio0", "gpio1";
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drive-strength = <2>;
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drive-strength = <2>;
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qcom,remote;
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};
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};
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};
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};
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};
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};
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@@ -1969,7 +1972,34 @@
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drive-strength = <2>;
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drive-strength = <2>;
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};
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};
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};
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};
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usb_phy_ps: usb_phy_ps {
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usb3phy_portselect_default: usb3phy_portselect_default {
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mux {
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pins = "gpio122";
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function = "usb0_phy_ps";
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};
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config {
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pins = "gpio122";
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bias-pull-down;
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drive-strength = <2>;
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};
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};
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usb3phy_portselect_gpio: usb3phy_portselect_gpio {
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mux {
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pins = "gpio122";
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function = "gpio";
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};
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config {
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pins = "gpio122";
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drive-strength = <2>;
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bias-pull-down;
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input-enable;
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};
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};
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};
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/* touchscreen pins */
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/* touchscreen pins */
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pmx_ts_active {
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pmx_ts_active {
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ts_active: ts_active {
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ts_active: ts_active {
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@@ -259,3 +259,14 @@
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};
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};
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};
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};
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};
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};
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&pm7550ba_eusb2_repeater {
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vdd18-supply = <&L7B>;
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vdd3-supply = <&L17B>;
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status = "ok";
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};
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&eusb2_phy0 {
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dummy-supply = <&pm7550ba_eusb2_repeater>;
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usb-repeater = <&pm7550ba_eusb2_repeater>;
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};
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@@ -111,7 +111,7 @@
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pinctrl-0 = <&sdc2_on>;
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pinctrl-0 = <&sdc2_on>;
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pinctrl-1 = <&sdc2_off>;
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pinctrl-1 = <&sdc2_off>;
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cd-gpios = <&tlmm 55 GPIO_ACTIVE_LOW>;
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cd-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
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qcom,uses_level_shifter;
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qcom,uses_level_shifter;
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@@ -466,8 +466,8 @@
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pinctrl-names = "default", "sleep";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&qupv3_se8_i2c_sda_active>, <&qupv3_se8_i2c_scl_active>;
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pinctrl-0 = <&qupv3_se8_i2c_sda_active>, <&qupv3_se8_i2c_scl_active>;
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pinctrl-1 = <&qupv3_se8_i2c_sleep>;
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pinctrl-1 = <&qupv3_se8_i2c_sleep>;
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dmas = <&gpi_dma2 0 0 3 64 0>,
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dmas = <&gpi_dma2 0 0 3 1024 0>,
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<&gpi_dma2 1 0 3 64 0>;
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<&gpi_dma2 1 0 3 1024 0>;
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dma-names = "tx", "rx";
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dma-names = "tx", "rx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -76,7 +76,7 @@
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dma-coherent;
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dma-coherent;
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interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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usb-phy = <&eusb2_phy0>, <&usb_nop_phy>;
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usb-phy = <&eusb2_phy0>, <&usb_qmp_dp_phy>;
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snps,disable-clk-gating;
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snps,disable-clk-gating;
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snps,has-lpm-erratum;
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snps,has-lpm-erratum;
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snps,hird-threshold = /bits/ 8 <0x0>;
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snps,hird-threshold = /bits/ 8 <0x0>;
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@@ -152,6 +152,9 @@
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<&gcc GCC_USB3_PHY_PRIM_BCR>;
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<&gcc GCC_USB3_PHY_PRIM_BCR>;
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reset-names = "global_phy_reset", "phy_reset";
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reset-names = "global_phy_reset", "phy_reset";
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pinctrl-names = "default";
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pinctrl-0 = <&usb3phy_portselect_default>;
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qcom,qmp-phy-reg-offset =
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qcom,qmp-phy-reg-offset =
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<USB3_DP_PCS_PCS_STATUS1
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<USB3_DP_PCS_PCS_STATUS1
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USB3_DP_PCS_USB3_AUTONOMOUS_MODE_CTRL
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USB3_DP_PCS_USB3_AUTONOMOUS_MODE_CTRL
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@@ -1204,6 +1204,43 @@
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};
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};
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};
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};
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soccp_pas: remoteproc-soccp@a3380000 {
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compatible = "qcom,tuna-soccp-pas";
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reg = <0xa3380000 0x10000>;
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status = "ok";
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cx-supply = <&VDD_CX_LEVEL>;
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cx-uV-uA = <RPMH_REGULATOR_LEVEL_LOW_SVS 0>;
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mx-supply = <&VDD_MX_LEVEL>;
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mx-uV-uA = <RPMH_REGULATOR_LEVEL_LOW_SVS 0>;
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reg-names = "cx", "mx";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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memory-region = <&soccp_mem 0>;
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soccp-config = <&tcsr 0x1a000>;
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/* Inputs from SOCCP */
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interrupts-extended = <&intc GIC_SPI 167 IRQ_TYPE_EDGE_RISING>,
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<&soccp_smp2p_in 0 0>,
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<&soccp_smp2p_in 1 0>,
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<&soccp_smp2p_in 3 0>,
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<&soccp_smp2p_in 2 0>,
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<&soccp_smp2p_in 9 0>;
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interrupt-names = "wdog",
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"fatal",
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"ready",
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"stop-ack",
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"handover",
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"pong";
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/* Outputs to soccp */
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qcom,smem-states = <&soccp_smp2p_out 0>, <&soccp_smp2p_out 10>, <&soccp_smp2p_out 9>;
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qcom,smem-state-names = "stop", "wakeup", "sleep";
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};
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sys-pm-vx@c320000 {
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sys-pm-vx@c320000 {
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compatible = "qcom,sys-pm-violators", "qcom,sys-pm-tuna";
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compatible = "qcom,sys-pm-violators", "qcom,sys-pm-tuna";
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reg = <0xc320000 0x400>;
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reg = <0xc320000 0x400>;
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@@ -2198,7 +2235,7 @@
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dma-coherent;
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dma-coherent;
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memory-region = <&sdhc_2_dma_resv>;
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memory-region = <&sdhc_2_dma_resv>;
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interconnects = <&aggre2_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
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interconnects = <&aggre1_noc MASTER_SDCC_2 &mc_virt SLAVE_EBI1>,
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<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;
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<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_SDCC_2>;
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interconnect-names = "sdhc-ddr","cpu-sdhc";
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interconnect-names = "sdhc-ddr","cpu-sdhc";
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operating-points-v2 = <&sdhc2_opp_table>;
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operating-points-v2 = <&sdhc2_opp_table>;
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@@ -2839,6 +2876,44 @@
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compatible = "qcom,cpufreq-stats-v2";
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compatible = "qcom,cpufreq-stats-v2";
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};
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};
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qcom_mpam: qcom,mpam {
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compatible = "qcom,mpam";
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};
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cpu_mpam: qcom,cpu_mpam {
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compatible = "qcom,cpu-mpam";
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L3 {
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qcom,msc-id = <0>;
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qcom,msc-name = "L3";
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};
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};
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noc_bw_mpam: qcom,noc_bw_mpam {
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compatible = "qcom,platform-mpam";
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reg = <0x17D2EC00 0x400>;
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reg-names = "mon-base";
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qcom,msc-id = <3>;
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qcom,msc-name = "noc_bw";
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qcom,gears = "low", "medium", "high", "veryhigh";
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qcom,gear-id = <1>, <2>, <3>, <4>;
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cpu {
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qcom,client-id = <0x1>;
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qcom,client-name = "cpu";
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};
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gpu {
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qcom,client-id = <0x10>;
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qcom,client-name = "gpu";
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};
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nsp {
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qcom,client-id = <0x100>;
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qcom,client-name = "nsp";
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};
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};
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llcc_pmu: llcc-pmu@24095000 {
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llcc_pmu: llcc-pmu@24095000 {
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compatible = "qcom,llcc-pmu-ver2";
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compatible = "qcom,llcc-pmu-ver2";
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reg = <0x24095000 0x300>;
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reg = <0x24095000 0x300>;
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