From fee1af2a6b9bb2234965c59dff9aa3cba060f499 Mon Sep 17 00:00:00 2001 From: vchollan Date: Mon, 16 Sep 2024 16:20:26 +0530 Subject: [PATCH 1/3] msm: synx: Bonito synx dtsi changes Change-Id: I01cd065cfb2b7148de8e05e00fa45c6e7da70ca5 Signed-off-by: vchollan --- config/sun.mk | 12 +- synx/tuna-synx.dts | 16 +++ synx/tuna-synx.dtsi | 292 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 316 insertions(+), 4 deletions(-) create mode 100644 synx/tuna-synx.dts create mode 100644 synx/tuna-synx.dtsi diff --git a/config/sun.mk b/config/sun.mk index 6b319c3d..88a77a8f 100644 --- a/config/sun.mk +++ b/config/sun.mk @@ -1,4 +1,8 @@ -dtbo-y := synx/sun-synx.dtbo -#dtbo-y += sun-synx-cdp.dtbo -#dtbo-y += sun-synx-mtp.dtbo -#dtbo-y += sun-synx-qrd.dtbo +ifeq ($(CONFIG_ARCH_TUNA), y) + dtbo-y := synx/tuna-synx.dtbo +else + dtbo-y := synx/sun-synx.dtbo + #dtbo-y += sun-synx-cdp.dtbo + #dtbo-y += sun-synx-mtp.dtbo + #dtbo-y += sun-synx-qrd.dtbo +endif diff --git a/synx/tuna-synx.dts b/synx/tuna-synx.dts new file mode 100644 index 00000000..3c25fa68 --- /dev/null +++ b/synx/tuna-synx.dts @@ -0,0 +1,16 @@ +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ +/dts-v1/; +/plugin/; + +#include +#include +#include "tuna-synx.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. tuna SoC"; + compatible = "qcom,tuna"; + qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,board-id = <0 0>, <15 0>; +}; \ No newline at end of file diff --git a/synx/tuna-synx.dtsi b/synx/tuna-synx.dtsi new file mode 100644 index 00000000..e64e131b --- /dev/null +++ b/synx/tuna-synx.dtsi @@ -0,0 +1,292 @@ +/* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + */ +#include + +&soc { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; + + ipcc_compute_l0: qcom,ipcc_compute_l0@443000 { + compatible = "qcom,ipcc"; + reg = <0x443000 0x1000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + #mbox-cells = <2>; + }; + ipclite { + compatible = "qcom,ipclite"; + memory-region = <&global_sync_mem>; + hwlocks = <&tcsr_mutex 11>; + #address-cells = <1>; + #size-cells = <1>; + major_version = <1>; + minor_version = <0>; + feature_mask_low = <0x0003>; + feature_mask_high = <0x0000>; + ranges; + + ipclite_apss: apss { + qcom,remote-pid = <0>; + label = "apss"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_BROADCAST + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_APSS + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + + ipclite_cdsp: cdsp { + qcom,remote-pid = <5>; + label = "cdsp"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CDSP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + + ipclite_cvp: cvp { + qcom,remote-pid = <6>; + label = "cvp"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CVP + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + + ipclite_cam: cam { + qcom,remote-pid = <7>; + label = "cam"; + + ipclite_signal_0 { + index = <0>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MSG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_1 { + index = <1>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_MEM_INIT>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_2 { + index = <2>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_VERSION>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_3 { + index = <3>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_TEST>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_4 { + index = <4>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_SSR>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + + ipclite_signal_5 { + index = <5>; + mboxes = <&ipcc_compute_l0 IPCC_CLIENT_CAM + IPCC_COMPUTE_L0_SIGNAL_IPCLITE_DEBUG>; + interrupt-parent = <&ipcc_compute_l0>; + interrupts = ; + }; + }; + }; + +}; From 7625dce00e823ac2a95966eb3b63854a3d66855d Mon Sep 17 00:00:00 2001 From: vchollan Date: Tue, 22 Oct 2024 18:44:33 +0530 Subject: [PATCH 2/3] msm: synx: make file changes of synx-tuna Bringup CONFIG_ARCH_TUNA is enabled for tuna and sun variants. Both tuna and sun dts files getting compiled, corresponding dts variant will be picked based on msm-id. Change-Id: Iff3f77eb6ef22d897dfd08b4e9b919c92eaac43a Signed-off-by: vchollan --- config/sun.mk | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/config/sun.mk b/config/sun.mk index 88a77a8f..ef5df50f 100644 --- a/config/sun.mk +++ b/config/sun.mk @@ -1,8 +1,7 @@ +dtbo-y := synx/sun-synx.dtbo ifeq ($(CONFIG_ARCH_TUNA), y) - dtbo-y := synx/tuna-synx.dtbo -else - dtbo-y := synx/sun-synx.dtbo - #dtbo-y += sun-synx-cdp.dtbo - #dtbo-y += sun-synx-mtp.dtbo - #dtbo-y += sun-synx-qrd.dtbo + dtbo-y += synx/tuna-synx.dtbo endif +#dtbo-y += sun-synx-cdp.dtbo +#dtbo-y += sun-synx-mtp.dtbo +#dtbo-y += sun-synx-qrd.dtbo From 4facd7acc97a2673f6eb598335886bc48fffa9c4 Mon Sep 17 00:00:00 2001 From: vchollan Date: Mon, 28 Oct 2024 19:30:34 +0530 Subject: [PATCH 3/3] msm: synx: synx dts changes for tunaP variant Change-Id: I99ad97ed1174beb4c19b1fc6cafceca90eee9544 Signed-off-by: vchollan --- synx/tuna-synx.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/synx/tuna-synx.dts b/synx/tuna-synx.dts index 3c25fa68..17dd3b19 100644 --- a/synx/tuna-synx.dts +++ b/synx/tuna-synx.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. tuna SoC"; compatible = "qcom,tuna"; - qcom,msm-id = <655 0x10000>, <681 0x10000>; + qcom,msm-id = <655 0x10000>, <681 0x10000>, <694 0x10000>; qcom,board-id = <0 0>, <15 0>; }; \ No newline at end of file