From 3c46ebee9d5c185d50224f0d81295951e64a5556 Mon Sep 17 00:00:00 2001
From: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
Date: Sat, 24 Aug 2024 00:43:17 +0530
Subject: [PATCH] ARM: dts: msm: Modify SMMU reg field format for sdxkova

Modify SMMU register field format as per the parent SoC
address and size cells.

Change-Id: Ifce3e103601a82b1b9f6295d6abef826f917b0fc
Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
---
 qcom/msm-arm-smmu-sdxkova.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/qcom/msm-arm-smmu-sdxkova.dtsi b/qcom/msm-arm-smmu-sdxkova.dtsi
index 66732ae4..c02552d5 100644
--- a/qcom/msm-arm-smmu-sdxkova.dtsi
+++ b/qcom/msm-arm-smmu-sdxkova.dtsi
@@ -8,7 +8,7 @@
 &soc {
 	apps_smmu: apps-smmu@15000000 {
 		compatible = "qcom,qsmmu-v500";
-		reg = <0x15000000 0x40000>;
+		reg = <0x0 0x15000000 0x0 0x40000>;
 		#iommu-cells = <2>;
 		qcom,use-3-lvl-tables;
 		#global-interrupts = <1>;