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ARM: dts: qcom: Enable UFS MCQ on Tuna platforms

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Enable the UFS MCQ feature on the Tuna platforms.

Change-Id: I0f420831e9af2c3965344c33a042b75196abc1d7
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
This commit is contained in:
Manish Pandey
2024-11-13 23:00:09 +05:30
parent 33ec100485
commit 3a9122b108
1 changed files with 11 additions and 3 deletions
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14
qcom/tuna.dtsi
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@@ -2275,8 +2275,10 @@
ufshc_mem: ufshc@1d84000 { ufshc_mem: ufshc@1d84000 {
compatible = "qcom,ufshc"; compatible = "qcom,ufshc";
reg = <0x1d84000 0x3000>, reg = <0x1d84000 0x3000>,
<0x1d88000 0x18000>; <0x1d88000 0x18000>,
reg-names = "ufs_mem", "ice"; <0x1da5000 0x2000>,
<0x1da4000 0x10>;
reg-names = "ufs_mem", "ice", "mcq_sqd", "mcq_vs";
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
phys = <&ufsphy_mem>; phys = <&ufsphy_mem>;
@@ -2284,6 +2286,9 @@
#reset-cells = <1>; #reset-cells = <1>;
qcom,ice-use-hwkm; qcom,ice-use-hwkm;
qcom,prime-mask = <0x80>;
qcom,silver-mask = <0x0f>;
qcom,esi-affinity-mask = <1 1 4 4 3 6 6 7>;
lanes-per-direction = <2>; lanes-per-direction = <2>;
clock-names = clock-names =
@@ -2325,7 +2330,8 @@
depends-on-supply = <&apps_smmu>; depends-on-supply = <&apps_smmu>;
iommus = <&apps_smmu 0x60 0x0>; iommus = <&apps_smmu 0x60 0x0>;
qcom,iommu-dma = "bypass"; qcom,iommu-dma = "fastmap";
qcom,iommu-msi-size = <0x1000>;
memory-region = <&ufshc_dma_resv>; memory-region = <&ufshc_dma_resv>;
shared-ice-cfg = <&ice_cfg>; shared-ice-cfg = <&ice_cfg>;
dma-coherent; dma-coherent;
@@ -2333,6 +2339,8 @@
qcom,bypass-pbl-rst-wa; qcom,bypass-pbl-rst-wa;
qcom,max-cpus = <8>; qcom,max-cpus = <8>;
msi-parent = <&gic_its 0x60>;
reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>; reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>;
resets = <&gcc GCC_UFS_PHY_BCR>; resets = <&gcc GCC_UFS_PHY_BCR>;
reset-names = "rst"; reset-names = "rst";