From a82edd51205c048fc8b1dc45d4301df59ee4aecf Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Fri, 18 Oct 2024 16:01:49 +0530 Subject: [PATCH 01/18] ARM: dts: msm:update the bcs signal port for tuna Update the bcs signal port for Tuna, the bcs is on DP4 CH3. Change-Id: Icaf2239a0da5f332124a726db0edde05aa67bb1e Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-overlay.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index f691bcd1..9d6de312 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -345,7 +345,7 @@ <2 ADC3 0x1 0 SWRM_TX1_CH3>, <3 DMIC0 0x4 0 SWRM_TX2_CH1>, <3 DMIC1 0x8 0 SWRM_TX2_CH2>, - <3 MBHC 0x1 0 SWRM_TX2_CH3>, + <3 MBHC 0x4 0 SWRM_TX2_CH3>, <4 DMIC2 0x1 0 SWRM_TX2_CH3>, <4 DMIC3 0x2 0 SWRM_TX2_CH4>, <4 DMIC4 0x3 0 SWRM_TX3_CH1>, From ce266d114be7eb2491b7fb22a53c4cc1cbc28c6c Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 29 Oct 2024 11:59:38 +0530 Subject: [PATCH 02/18] ARM: dts: msm: Add support for TunaP -Add and update MSM_ID for TunaP. Change-Id: I8d5c4b306e11b594e466ce749e788061123977b0 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-atp.dts | 2 +- tuna-audio-cdp.dts | 2 +- tuna-audio-hamilton-mtp.dts | 2 +- tuna-audio-hamilton-rcm.dts | 2 +- tuna-audio-mtp-qmp1000.dts | 2 +- tuna-audio-mtp.dts | 2 +- tuna-audio-qrd.dts | 2 +- tuna-audio-rcm.dts | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/tuna-audio-atp.dts b/tuna-audio-atp.dts index 35f93660..5ba54dc9 100644 --- a/tuna-audio-atp.dts +++ b/tuna-audio-atp.dts @@ -12,6 +12,6 @@ compatible = "qcom,tuna-atp", "qcom,tuna", "qcom,tunap-atp", "qcom,tunap", "qcom,atp"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <33 0>; }; diff --git a/tuna-audio-cdp.dts b/tuna-audio-cdp.dts index 8acd92ac..32bc79b4 100644 --- a/tuna-audio-cdp.dts +++ b/tuna-audio-cdp.dts @@ -12,7 +12,7 @@ model = "Qualcomm Technologies, Inc. Tuna CDP"; compatible = "qcom,tuna-cdp", "qcom,tuna", "qcom,tunap-cdp", "qcom,tunap", "qcom,cdp"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <1 0>; }; diff --git a/tuna-audio-hamilton-mtp.dts b/tuna-audio-hamilton-mtp.dts index ca0b2fa9..2307e397 100644 --- a/tuna-audio-hamilton-mtp.dts +++ b/tuna-audio-hamilton-mtp.dts @@ -12,6 +12,6 @@ model = "Qualcomm Technologies, Inc. Tuna MTP + kiwi WLAN"; compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <8 2>; }; diff --git a/tuna-audio-hamilton-rcm.dts b/tuna-audio-hamilton-rcm.dts index abce2d58..b622dd09 100644 --- a/tuna-audio-hamilton-rcm.dts +++ b/tuna-audio-hamilton-rcm.dts @@ -12,6 +12,6 @@ model = "Qualcomm Technologies, Inc. Tuna RCM + kiwi WLAN"; compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,tunap-rcm", "qcom,tunap", "qcom,rcm"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <21 1>; }; diff --git a/tuna-audio-mtp-qmp1000.dts b/tuna-audio-mtp-qmp1000.dts index 87ffd4b6..b2722bcd 100644 --- a/tuna-audio-mtp-qmp1000.dts +++ b/tuna-audio-mtp-qmp1000.dts @@ -12,7 +12,7 @@ model = "Qualcomm Technologies, Inc. Tuna MTP QMP1000"; compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <8 1>; }; diff --git a/tuna-audio-mtp.dts b/tuna-audio-mtp.dts index ac99ba4b..fef29692 100644 --- a/tuna-audio-mtp.dts +++ b/tuna-audio-mtp.dts @@ -12,7 +12,7 @@ model = "Qualcomm Technologies, Inc. Tuna MTP"; compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <8 0>; }; diff --git a/tuna-audio-qrd.dts b/tuna-audio-qrd.dts index b637f501..616e5aa1 100644 --- a/tuna-audio-qrd.dts +++ b/tuna-audio-qrd.dts @@ -12,6 +12,6 @@ model = "Qualcomm Technologies, Inc. Tuna QRD"; compatible = "qcom,tuna-qrd", "qcom,tuna", "qcom,tunap-qrd", "qcom,tunap", "qcom,qrd"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <11 0>; }; diff --git a/tuna-audio-rcm.dts b/tuna-audio-rcm.dts index 39c04ad1..1b532e17 100644 --- a/tuna-audio-rcm.dts +++ b/tuna-audio-rcm.dts @@ -11,6 +11,6 @@ model = "Qualcomm Technologies, Inc. Tuna RCM"; compatible = "qcom,tuna-rcm", "qcom,tuna", "qcom,tunap-rcm", "qcom,tunap", "qcom,rcm"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <21 0>; }; From 412366391332cbe1b6afab92523f6b18787ab328 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Tue, 22 Oct 2024 15:28:23 +0530 Subject: [PATCH 03/18] ARM: dts: msm: Add support for WCD939x in tuna7 -Add and update MSM_ID for tuna7. -Add Board_Id for tuna7. -Add AATC support for tuna7 platform. Change-Id: I7f470c0150ec95b556087ab6797787b9754e8464 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- Kbuild | 1 + tuna7-audio-mtp.dts | 4 ++-- tuna7-audio-mtp.dtsi | 43 ++++++++++++++++++++++++++++++++++--------- 3 files changed, 37 insertions(+), 11 deletions(-) diff --git a/Kbuild b/Kbuild index 4dee0ac9..41df44be 100644 --- a/Kbuild +++ b/Kbuild @@ -38,6 +38,7 @@ dtbo-y += sun-audio.dtbo \ tuna-audio-hamilton-mtp.dtbo \ tuna-audio-hamilton-rcm.dtbo \ tuna-audio-mtp.dtbo \ + tuna7-audio-mtp.dtbo \ tuna-audio-mtp-qmp1000.dtbo \ tuna-audio-qrd.dtbo \ tuna-audio-rcm.dtbo diff --git a/tuna7-audio-mtp.dts b/tuna7-audio-mtp.dts index 6d8fad89..746c8187 100644 --- a/tuna7-audio-mtp.dts +++ b/tuna7-audio-mtp.dts @@ -12,6 +12,6 @@ model = "Qualcomm Technologies, Inc. Tuna 7"; compatible = "qcom,tuna-mtp", "qcom,tuna", "qcom,tunap-mtp", "qcom,tunap", "qcom,mtp"; - qcom,msm-id = <681 0x10000>; - qcom,board-id = <0 0>; + qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,board-id = <8 3>, <8 4>; }; diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi index a8e30ed0..74de7073 100644 --- a/tuna7-audio-mtp.dtsi +++ b/tuna7-audio-mtp.dtsi @@ -21,24 +21,34 @@ status = "okay"; }; +&wcd939x_rx_slave { + status = "okay"; +}; + &wcd9378_codec { status = "disabled"; }; &wcd939x_codec { status = "okay"; + /* 0 for digital crosstalk disabled, + * 1 for digital crosstalk with local sensed a-xtalk enabled, and + * 2 for digital crosstalk with remote sensed a-xtalk enabled. + */ + qcom,usbcss-hs-xtalk-config = <0>; + qcom,usbcss-hs-rdson = <600>; + qcom,usbcss-hs-r2 = <7550>; + qcom,usbcss-hs-r3 = <1>; + qcom,usbcss-hs-r4 = <330>; + qcom,usbcss-hs-r5 = <5>; + qcom,usbcss-hs-r6 = <1>; + qcom,usbcss-hs-r7 = <5>; + qcom,usbcss-hs-lin-k-aud = <13>; + qcom,usbcss-hs-lin-k-gnd = <13>; }; &tuna_snd { qcom,model = "tuna7-mtp-snd-card"; - qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, - <&lpass_cdc>; - asoc-codec = <&stub_codec>, <&lpass_cdc>, - <&wcd939x_codec>, <&wsa884x_0220>, - <&wsa884x_0221>; - asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd939x_codec", "wsa-codec1", - "wsa-codec2"; qcom,audio-routing = "AMIC1", "Analog Mic1", @@ -71,7 +81,7 @@ "TX DMIC3", "MIC BIAS1", "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", - "IN3_AUX", "AUX_OUT", + "IN3_EAR", "AUX_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", @@ -93,4 +103,19 @@ "VA DMIC1", "VA MIC BIAS3", "VA DMIC2", "VA MIC BIAS1", "VA DMIC3", "VA MIC BIAS1"; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&wsa884x_0220>, + <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "wsa-codec1", + "wsa-codec2"; + qcom,wsa-max-devs = <2>; + qcom,wcd-disable-legacy-surge; + wcd939x-i2c-handle = <&wcd_usbss>; + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; }; From 3d9ce00821ffee8c195de324e3dc91a85baac387 Mon Sep 17 00:00:00 2001 From: Kisan Yadav Date: Wed, 23 Oct 2024 14:50:34 +0530 Subject: [PATCH 04/18] ARM: dts: msm: Update correct wsa codec - Update correct wsa codec for monospeaker usecase. Change-Id: Id064bd37758235161bbb4cadacfaf4368393e951 Signed-off-by: Kisan Yadav --- tuna-audio-qrd.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index 2faaff61..5cb9ac46 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -112,7 +112,7 @@ asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd939x_codec>, <&wsa884x_0220>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd939x_codec", "wsa-codec1"; + "wcd939x_codec", "wsa-codec2"; qcom,wsa-max-devs = <1>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; From efe96d7aa4f0ddcbbecf6693c74f79c9673d68df Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 28 Oct 2024 10:25:13 +0530 Subject: [PATCH 05/18] ARM: dts: msm: Add support for platforms for Kera Add audio device tree support for ATP, CDP, MTP, QRD, RCM platforms for Kera SoC. Change-Id: I902e8704d07cafe118047b152d83979f57cbf334 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- Kbuild | 12 + kera-audio-atp.dts | 17 + kera-audio-atp.dtsi | 63 + kera-audio-cdp.dts | 19 + kera-audio-cdp.dtsi | 141 +++ kera-audio-lpass-reg.dtsi | 37 + kera-audio-mtp-qmp1000.dts | 18 + kera-audio-mtp-qmp1000.dtsi | 194 ++++ kera-audio-mtp.dts | 18 + kera-audio-mtp.dtsi | 164 +++ kera-audio-overlay.dtsi | 740 ++++++++++++ kera-audio-qrd.dts | 17 + kera-audio-qrd.dtsi | 85 ++ kera-audio-rcm.dts | 17 + kera-audio.dts | 21 + kera-audio.dtsi | 186 +++ kera-lpi.dtsi | 2189 +++++++++++++++++++++++++++++++++++ 17 files changed, 3938 insertions(+) create mode 100644 kera-audio-atp.dts create mode 100644 kera-audio-atp.dtsi create mode 100644 kera-audio-cdp.dts create mode 100644 kera-audio-cdp.dtsi create mode 100644 kera-audio-lpass-reg.dtsi create mode 100644 kera-audio-mtp-qmp1000.dts create mode 100644 kera-audio-mtp-qmp1000.dtsi create mode 100644 kera-audio-mtp.dts create mode 100644 kera-audio-mtp.dtsi create mode 100644 kera-audio-overlay.dtsi create mode 100644 kera-audio-qrd.dts create mode 100644 kera-audio-qrd.dtsi create mode 100644 kera-audio-rcm.dts create mode 100644 kera-audio.dts create mode 100644 kera-audio.dtsi create mode 100644 kera-lpi.dtsi diff --git a/Kbuild b/Kbuild index 41df44be..7f2413b5 100644 --- a/Kbuild +++ b/Kbuild @@ -44,6 +44,18 @@ dtbo-y += sun-audio.dtbo \ tuna-audio-rcm.dtbo endif + +ifeq ($(CONFIG_ARCH_KERA), y) +dtbo-y += kera-audio.dtbo \ + kera-audio-atp.dtbo \ + kera-audio-cdp.dtbo \ + kera-audio-mtp.dtbo \ + kera-audio-mtp-qmp1000.dtbo \ + kera-audio-qrd.dtbo \ + kera-audio-rcm.dtbo + +endif + always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo diff --git a/kera-audio-atp.dts b/kera-audio-atp.dts new file mode 100644 index 00000000..aff7ea8d --- /dev/null +++ b/kera-audio-atp.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-atp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Kera ATP"; + compatible = "qcom,kera-atp", "qcom,kera", "qcom,kerap-atp", "qcom,kerap", + "qcom,atp"; + + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <33 0>; +}; diff --git a/kera-audio-atp.dtsi b/kera-audio-atp.dtsi new file mode 100644 index 00000000..3d2cee82 --- /dev/null +++ b/kera-audio-atp.dtsi @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "kera-audio-mtp.dtsi" + +&lpass_bt_swr { + status = "disabled"; +}; + +&kera_snd { + qcom,wcn-btfm = <0>; + qcom,ext-disp-audio-rx = <0>; + qcom,wcd-disabled =<1>; + qcom,audio-routing = + "TX DMIC0", "Digital Mic0", + "TX DMIC1", "Digital Mic1", + "TX DMIC2", "Digital Mic2", + "TX DMIC3", "Digital Mic3"; + qcom,wsa-max-devs = <0>; +}; + +&wsa_swr { + qcom,swr-num-dev = <0>; +}; + +&wsa884x_0220 { + status = "disabled"; +}; + +&wsa884x_0221 { + status = "disabled"; +}; + +&wcd939x_codec { + status = "disabled"; +}; + +&wcd939x_rx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "disabled"; +}; + +&wcd9378_codec { + status = "disabled"; +}; + +&wcd9378_rx_slave { + status = "disabled"; +}; + +&wcd9378_tx_slave { + status = "disabled"; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs= <4>, <4>; +}; + diff --git a/kera-audio-cdp.dts b/kera-audio-cdp.dts new file mode 100644 index 00000000..179f0f45 --- /dev/null +++ b/kera-audio-cdp.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-cdp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera CDP"; + compatible = "qcom,kera-cdp", "qcom,kera", "qcom,kerap-cdp", "qcom,kerap", + "qcom,cdp"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x10001 0>, <0x20001 0>, + <0x30001 0>, <0x40001 0>; +}; + diff --git a/kera-audio-cdp.dtsi b/kera-audio-cdp.dtsi new file mode 100644 index 00000000..b14dcf5d --- /dev/null +++ b/kera-audio-cdp.dtsi @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "kera-audio-overlay.dtsi" +#include "kera-audio-lpass-reg.dtsi" + +&cdc_pri_mi2s_gpios { + status = "ok"; +}; + +&cdc_quat_mi2s_gpios { + status = "disabled"; +}; + +&cdc_quin_mi2s_gpios { + status = "disabled"; +}; + +&cdc_sen_mi2s_gpios { + status = "disabled"; +}; + +&cdc_sep_mi2s_gpios { + status = "disabled"; +}; + +&lpass_bt_swr { + status = "disabled"; +}; + +&wcd9378_codec { + status = "okay"; + cdc-vdd-io-supply = <&L7B>; + qcom,cdc-vdd-io-voltage = <1800000 1800000>; + qcom,cdc-vdd-io-current = <20000>; + qcom,cdc-vdd-io-lpm-supported = <1>; + + cdc-vdd-mic-bias-supply = <&BOB>; + qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>; + qcom,cdc-vdd-mic-bias-current = <40550>; +}; + +&wcd939x_rx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "disabled"; +}; + +&wcd9378_rx_slave { + status = "okay"; +}; + +&wcd9378_tx_slave { + status = "okay"; +}; + +&wsa_swr { + wsa884x_0220: wsa884x@02170220 { + status = "okay"; + }; + + wsa884x_0221: wsa884x@02170221 { + status = "okay"; + }; +}; + +&kera_snd { + qcom,model = "kera-cdp-snd-card"; + swr-haptics-unsupported; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS1", + "VA DMIC1", "VA MIC BIAS1", + "VA DMIC2", "VA MIC BIAS3", + "VA DMIC3", "VA MIC BIAS3"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd9378_codec>, + <&wsa884x_0220>, <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd9378_codec", + "wsa-codec1", "wsa-codec2"; + qcom,wsa-max-devs = <2>; + qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>; + qcom,quat-mi2s-gpios = <&cdc_quat_mi2s_gpios>; + qcom,quin-mi2s-gpios = <&cdc_quin_mi2s_gpios>; + qcom,sen-mi2s-gpios = <&cdc_sen_mi2s_gpios>; + qcom,sep-mi2s-gpios = <&cdc_sep_mi2s_gpios>; + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <1680>; +}; diff --git a/kera-audio-lpass-reg.dtsi b/kera-audio-lpass-reg.dtsi new file mode 100644 index 00000000..d42a3289 --- /dev/null +++ b/kera-audio-lpass-reg.dtsi @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +&rx_macro { + reg = <0x6AC0000 0x0>; +}; + +&rx_swr { + swrm-io-base = <0x6AD0000 0x0>; + interrupts = ; +}; + +&tx_macro { + reg = <0x6AE0000 0x0>; +}; + +&wsa_macro { + reg = <0x6B00000 0x0>; +}; + +&wsa_swr { + swrm-io-base = <0x6B10000 0x0>; + interrupts = ; +}; + +&tx_swr { + reg = <0x7630000 0x0>; +}; + +&va_macro { + reg = <0x7660000 0x0>; +}; + +&tlmm { + reg = <0x7760000 0x0>; +}; diff --git a/kera-audio-mtp-qmp1000.dts b/kera-audio-mtp-qmp1000.dts new file mode 100644 index 00000000..dc1b558a --- /dev/null +++ b/kera-audio-mtp-qmp1000.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-mtp-qmp1000.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera MTP QMP1000"; + compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap", + "qcom,mtp"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x30008 0>, <0x30008 1>; +}; + diff --git a/kera-audio-mtp-qmp1000.dtsi b/kera-audio-mtp-qmp1000.dtsi new file mode 100644 index 00000000..4d803fc7 --- /dev/null +++ b/kera-audio-mtp-qmp1000.dtsi @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "kera-audio-mtp.dtsi" + +&rx_swr { + qcom,swr-num-dev = <2>; +}; + +&wcd9378_rx_slave { + status = "okay"; +}; + +&wcd9378_tx_slave { + status = "okay"; +}; + +&wcd9378_codec { + status = "okay"; +}; + +&wcd939x_rx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "disabled"; +}; + +&wcd939x_codec { + status = "disabled"; +}; + +&tx_swr { + qmp01: qmp@04170232 { + /* + * reg = ; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC01"; + qcom,codec-name = "qmp-dmic.01"; + qmp-vdd-supply = <&wcd_mb3_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; + }; + + qmp02: qmp@04170236 { + reg = <0x0100 0x04170236>; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC02"; + qcom,codec-name = "qmp-dmic.02"; + qmp-vdd-supply = <&wcd_mb3_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; + }; + + qmp03: qmp@04170230 { + reg = <0x0100 0x04170230>; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC03"; + qcom,codec-name = "qmp-dmic.03"; + qmp-vdd-supply = <&wcd_mb1_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; + }; + + qmp04: qmp@04170239 { + reg = <0x0100 0x04170239>; + compatible = "qcom,qmp-sdca-dmic"; + sound-name-prefix = "QMP_MIC04"; + qcom,codec-name = "qmp-dmic.04"; + qmp-vdd-supply = <&wcd_mb1_reg>; + qcom,swr-tx-port-params = + , , + , , + , , + , ; + reg-values = <0x401805B0 0x5 + 0x401805B1 0x5 + 0x401805B2 0x5 + 0x401805B3 0x5 + 0x401805B8 0x5>; + }; +}; + +&kera_snd { + qcom,model = "kera-mtp-qmp-snd-card"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd9378_codec>, + <&wsa884x_0220>, <&wsa884x_0221>, + <&qmp01>, <&qmp02>, + <&qmp03>, <&qmp04>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd9378_codec", + "wsa-codec1", "wsa-codec2", + "qmp-dmic.01", "qmp-dmic.02", + "qmp-dmic.03", "qmp-dmic.04"; + qcom,qmp-mic = <1>; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS3", + "AMIC5", "Analog Mic5", + "AMIC5", "MIC BIAS4", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS3", + "VA AMIC5", "Analog Mic5", + "VA AMIC5", "VA MIC BIAS4", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_EAR", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "TX SWR_INPUT", "QMP_MIC01 NORMAL_OUTPUT", + "TX SWR_INPUT", "QMP_MIC02 NORMAL_OUTPUT", + "TX SWR_INPUT", "QMP_MIC03 NORMAL_OUTPUT", + "TX SWR_INPUT", "QMP_MIC04 NORMAL_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "QMP_MIC01 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC02 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC03 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC04 LP_OUTPUT", + "VA SWR_INPUT", "QMP_MIC01 VA_NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC02 VA_NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC03 VA_NORMAL_OUTPUT", + "VA SWR_INPUT", "QMP_MIC04 VA_NORMAL_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; +}; diff --git a/kera-audio-mtp.dts b/kera-audio-mtp.dts new file mode 100644 index 00000000..778c442d --- /dev/null +++ b/kera-audio-mtp.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera MTP"; + compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap", + "qcom,mtp"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x10008 0>, <0x20008 0>, <0x10008 1>, <0x20008 1>; +}; + diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi new file mode 100644 index 00000000..0c0647b0 --- /dev/null +++ b/kera-audio-mtp.dtsi @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "kera-audio-overlay.dtsi" +#include "kera-audio-lpass-reg.dtsi" + +&tx_swr_clk_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data0_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data1_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data2_active { + config { + drive-strength = <2>; + }; +}; + +&rx_swr { + qcom,swr-num-dev = <2>; +}; + +&wsa_swr { + qcom,swr-num-dev = <2>; +}; + +&wsa884x_0220 { + status = "okay"; +}; + +&wsa884x_0221 { + status = "okay"; +}; + +&wcd9378_rx_slave { + status = "disabled"; +}; + +&wcd9378_tx_slave { + status = "disabled"; +}; + +&wcd9378_codec { + status = "disabled"; +}; + +&lpass_bt_swr { + status = "disabled"; +}; + +&wcd939x_rx_slave { + status = "okay"; +}; + +&wcd939x_tx_slave { + status = "okay"; +}; + +&wcd939x_codec { + status = "okay"; + /* 0 for digital crosstalk disabled, + * 1 for digital crosstalk with local sensed a-xtalk enabled, and + * 2 for digital crosstalk with remote sensed a-xtalk enabled. + */ + qcom,usbcss-hs-xtalk-config = <0>; + qcom,usbcss-hs-rdson = <600>; + qcom,usbcss-hs-r2 = <7550>; + qcom,usbcss-hs-r3 = <1>; + qcom,usbcss-hs-r4 = <330>; + qcom,usbcss-hs-r5 = <5>; + qcom,usbcss-hs-r6 = <1>; + qcom,usbcss-hs-r7 = <5>; + qcom,usbcss-hs-lin-k-aud = <13>; + qcom,usbcss-hs-lin-k-gnd = <13>; +}; + + +&kera_snd { + qcom,model = "kera-mtp-snd-card"; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS1", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS1", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "TX SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; + qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>; + qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd939x_codec>, <&wsa884x_0220>, + <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd939x_codec", "wsa-codec1", + "wsa-codec2"; + qcom,wsa-max-devs = <2>; + swr-haptics-unsupported; + qcom,pri_mi2s_gpios = <&cdc_pri_mi2s_gpios>; + qcom,wcd-disable-legacy-surge; + wcd939x-i2c-handle = <&wcd_usbss>; + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; +}; diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi new file mode 100644 index 00000000..e71a94f5 --- /dev/null +++ b/kera-audio-overlay.dtsi @@ -0,0 +1,740 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include "kera-lpi.dtsi" + +&lpass_cdc { + qcom,num-macros = <4>; + qcom,lpass-cdc-version = <7>; + #address-cells = <1>; + #size-cells = <1>; + lpass-cdc-clk-rsc-mngr { + compatible = "qcom,lpass-cdc-clk-rsc-mngr"; + qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>, + <0x3004 0x3 0x1>, <0x3080 0x2 0x2>; + qcom,rx_mclk_mode_muxsel = <0x06BEC0D8>; + qcom,wsa_mclk_mode_muxsel = <0x06BEA110>; + clock-names = "tx_core_clk", "rx_core_clk", "wsa_core_clk", + "rx_tx_core_clk", "wsa_tx_core_clk", "va_core_clk"; + clocks = <&clock_audio_tx_1 0>, <&clock_audio_rx_1 0>, + <&clock_audio_wsa_1 0>, <&clock_audio_rx_tx 0>, + <&clock_audio_wsa_tx 0>, <&clock_audio_va_1 0>; + }; + + va_macro: va-macro@7660000 { + compatible = "qcom,lpass-cdc-va-macro"; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + qcom,va-dmic-sample-rate = <600000>; + qcom,va-clk-mux-select = <1>; + qcom,default-clk-id = ; + qcom,use-clk-id = ; + qcom,is-used-swr-gpio = <1>; + qcom,va-swr-gpios = <&va_swr_gpios>; + tx_swr: va_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <3>; + qcom,mipi-sdw-block-packing-mode = <1>; + interrupts = + , + ; + interrupt-names = "swr_master_irq", "swr_wake_irq"; + qcom,swr-wakeup-required = <1>; + qcom,swr-num-ports = <5>; + qcom,swr-port-mapping = <1 SWRM_TX_PCM_OUT 0x3>, + <2 SWRM_TX1_CH1 0x1>, <2 SWRM_TX1_CH2 0x2>, + <2 SWRM_TX1_CH3 0x4>, <2 SWRM_TX1_CH4 0x8>, + <3 SWRM_TX2_CH1 0x1>, <3 SWRM_TX2_CH2 0x2>, + <3 SWRM_TX2_CH3 0x4>, <3 SWRM_TX2_CH4 0x8>, + <4 SWRM_TX3_CH1 0x1>, <4 SWRM_TX3_CH2 0x2>, + <4 SWRM_TX3_CH3 0x4>, <4 SWRM_TX3_CH4 0x8>, + <5 SWRM_TX_PCM_IN 0x3>; + qcom,swr-num-dev = <5>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-mstr-irq-wakeup-capable = <1>; + qcom,is-always-on = <1>; + wcd9378_tx_slave: wcd9378-tx-slave { + compatible = "qcom,wcd9378-slave"; + reg = <0x10 0x01170223>; + }; + + wcd939x_tx_slave: wcd939x-tx-slave { + status = "disabled"; + compatible = "qcom,wcd939x-slave"; + reg = <0x0E 0x01170223>; + }; + }; + }; + + tx_macro: tx-macro@6AE0000 { + compatible = "qcom,lpass-cdc-tx-macro"; + qcom,default-clk-id = ; + qcom,tx-dmic-sample-rate = <2400000>; + qcom,is-used-swr-gpio = <0>; + }; + + rx_macro: rx-macro@6AC0000 { + compatible = "qcom,lpass-cdc-rx-macro"; + qcom,rx-swr-gpios = <&rx_swr_gpios>; + qcom,rx_mclk_mode_muxsel = <0x06BEC0D8>; + qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + clock-names = "rx_mclk2_2x_clk"; + clocks = <&clock_audio_rx_mclk2_2x_clk 0>; + rx_swr: rx_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <2>; + qcom,mipi-sdw-block-packing-mode = <1>; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <12>; + qcom,swr-port-mapping = <1 HPH_L 0x1>, + <1 HPH_R 0x2>, <2 CLSH 0x3>, + <3 COMP_L 0x1>, <3 COMP_R 0x2>, + <4 LO 0x1>, <5 DSD_L 0x1>, + <5 DSD_R 0x2>, <6 PCM_OUT1 0x01>, + <7 GPPO 0x03>, <8 HAPT 0x03>, + <9 HIFI_PCM_L 0x01>, <9 HIFI_PCM_R 0x2>, + <10 HPTH 0x03>, <11 CMPT 0x03>, <12 IPCM 0x03>; + + /* num-dev is 2 if WCD RX and PMIC SWR Slaves are connected */ + /* num-dev is 1 if only WCD RX slave is connected */ + qcom,swr-num-dev = <1>; + qcom,swr-clock-stop-mode0 = <1>; + swr_haptics: swr_haptics@f0170220 { + compatible = "qcom,pmih010x-swr-haptics"; + reg = <0x03 0xf0170220>; + //swr-slave-supply = <&hap_swr_slave_reg>; + qcom,rx_swr_ch_map = <0 0x01 0x01 0 PCM_OUT1>; + status = "disabled"; + }; + + wcd9378_rx_slave: wcd9378-rx-slave { + compatible = "qcom,wcd9378-slave"; + reg = <0x10 0x01170224>; + status = "okay"; + }; + + wcd939x_rx_slave: wcd939x-rx-slave { + compatible = "qcom,wcd939x-slave"; + reg = <0x0E 0x01170224>; + status = "disabled"; + }; + }; + }; + + wsa_macro: wsa-macro@6B00000 { + compatible = "qcom,lpass-cdc-wsa-macro"; + wsa_data_fs_ctl_reg = <0x6B6F000>; + qcom,wsa-swr-gpios = <&wsa_swr_gpios>; + qcom,wsa-bat-cfgs= <1>, <1>; + qcom,wsa-rloads= <2>, <2>; + qcom,wsa-system-gains= <0 9>, <0 9>; + qcom,wsa-bcl-pmic-params = /bits/ 8 <0x00 0x03 0x48>; + qcom,default-clk-id = ; + qcom,thermal-max-state = <11>; + qcom,noise-gate-mode = <2>; + #cooling-cells = <2>; + wsa_swr: wsa_swr_master { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,swr_master_id = <1>; + qcom,mipi-sdw-block-packing-mode = <0>; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <13>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-port-mapping = <1 SPKR_L 0x1>, + <2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>, + <4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>, + <6 SPKR_R_BOOST 0x3>, <7 PBR 0x3>, + <8 SPKR_HAPT 0x3>, <9 OCPM 0x3>, + <10 SPKR_L_VI 0x3>, <11 SPKR_R_VI 0x3>, + <12 SPKR_IPCM 0x3>, <13 CPS 0x3>; + qcom,swr-num-dev = <1>; + qcom,dynamic-port-map-supported = <0>; + wsa884x_0220: wsa884x@02170220 { + compatible = "qcom,wsa884x"; + status = "disabled"; + reg = <0x4 0x2170220>; + qcom,spkr-sd-n-node = <&wsa_spkr_en02>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa_macro>; + qcom,swr-wsa-port-params = + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , ; + cdc-vdd-1p8-supply = <&L7B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrLeft"; + }; + + wsa884x_0221: wsa884x@02170221 { + compatible = "qcom,wsa884x"; + reg = <0x4 0x2170221>; + qcom,spkr-sd-n-node = <&wsa_spkr_en13>; + qcom,lpass-cdc-handle = <&lpass_cdc>; + qcom,wsa-macro-handle = <&wsa_macro>; + qcom,swr-wsa-port-params = + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , ; + cdc-vdd-1p8-supply = <&L7B>; + qcom,cdc-vdd-1p8-voltage = <1800000 1800000>; + qcom,cdc-vdd-1p8-current = <20000>; + qcom,cdc-vdd-1p8-lpm-supported = <1>; + qcom,cdc-static-supplies = "cdc-vdd-1p8"; + sound-name-prefix = "SpkrRight"; + }; + }; + }; + + wcd939x_codec: wcd939x-codec { + compatible = "qcom,wcd939x-codec"; + status = "disabled"; + qcom,split-codec = <1>; + qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>, + <0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>, + <2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>, + <3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>, + <4 DSD_R 0x2 0 DSD_R>, <5 HIFI_PCM_L 0x1 0 HIFI_PCM_L>, + <5 HIFI_PCM_R 0x2 0 HIFI_PCM_R>; + + qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>, + <0 ADC2 0x2 0 SWRM_TX1_CH2>, + <1 ADC3 0x1 0 SWRM_TX1_CH3>, + <1 ADC4 0x2 0 SWRM_TX1_CH4>, + <2 DMIC0 0x1 0 SWRM_TX2_CH1>, + <2 DMIC1 0x2 0 SWRM_TX2_CH2>, + <2 MBHC 0x4 0 SWRM_TX2_CH3>, + <2 DMIC2 0x4 0 SWRM_TX2_CH3>, + <2 DMIC3 0x8 0 SWRM_TX2_CH4>, + <3 DMIC4 0x1 0 SWRM_TX3_CH1>, + <3 DMIC5 0x2 0 SWRM_TX3_CH2>, + <3 DMIC6 0x4 0 SWRM_TX3_CH3>, + <3 DMIC7 0x8 0 SWRM_TX3_CH4>; + + qcom,swr-tx-port-params = + , , + , , + , , + , , + , , + , , + , , + , ; + qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>; + qcom,rx-slave = <&wcd939x_rx_slave>; + qcom,tx-slave = <&wcd939x_tx_slave>; + + cdc-vdd-rx-supply = <&L7B>; + qcom,cdc-vdd-rx-voltage = <1800000 1800000>; + qcom,cdc-vdd-rx-current = <45000>; + qcom,cdc-vdd-rx-lpm-supported = <1>; + + cdc-vdd-tx-supply = <&L7B>; + qcom,cdc-vdd-tx-voltage = <1800000 1800000>; + qcom,cdc-vdd-tx-current = <45000>; + qcom,cdc-vdd-tx-lpm-supported = <1>; + + cdc-vdd-buck-supply = <&L7B>; + qcom,cdc-vdd-buck-voltage = <1800000 1800000>; + qcom,cdc-vdd-buck-current = <650000>; + qcom,cdc-vdd-buck-lpm-supported = <1>; + + cdc-vdd-mic-bias-supply = <&BOB>; + qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; + qcom,cdc-vdd-mic-bias-current = <30000>; + + cdc-vdd-px-supply = <&L3G>; + qcom,cdc-vdd-px-voltage = <1200000 1200000>; + qcom,cdc-vdd-px-current = <15000>; + qcom,cdc-vdd-px-lpm-supported = <1>; + + qcom,cdc-vdd-px-rem-supported = <1>; + + qcom,cdc-micbias1-mv = <1800>; + qcom,cdc-micbias2-mv = <1800>; + qcom,cdc-micbias3-mv = <1800>; + qcom,cdc-micbias4-mv = <1800>; + + qcom,cdc-static-supplies = "cdc-vdd-rx", + "cdc-vdd-tx", + "cdc-vdd-mic-bias"; + qcom,cdc-on-demand-supplies = "cdc-vdd-buck", + "cdc-vdd-px"; + + wcd_mb1_reg: qcom,wcd-mb1-reg { + regulator-name = "wcd-mb1-reg"; + }; + + wcd_mb2_reg: qcom,wcd-mb2-reg { + regulator-name = "wcd-mb2-reg"; + }; + + wcd_mb3_reg: qcom,wcd-mb3-reg { + regulator-name = "wcd-mb3-reg"; + }; + + wcd_mb4_reg: qcom,wcd-mb4-reg { + regulator-name = "wcd-mb4-reg"; + }; + }; + + wcd9378_codec: wcd9378-codec { + compatible = "qcom,wcd9378-codec"; + qcom,split-codec = <1>; + qcom,wcd-mode = <1>; + qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>, + <0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>, + <2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>, + <3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>, + <4 DSD_R 0x2 0 DSD_R>; + qcom,tx_swr_ch_map = <0 ADC1 0x1 0 SWRM_TX1_CH1>, + <1 ADC2 0x1 0 SWRM_TX1_CH2>, + <2 ADC3 0x1 0 SWRM_TX1_CH3>, + <3 DMIC0 0x4 0 SWRM_TX2_CH1>, + <3 DMIC1 0x8 0 SWRM_TX2_CH2>, + <3 MBHC 0x1 0 SWRM_TX2_CH3>, + <4 DMIC2 0x1 0 SWRM_TX2_CH3>, + <4 DMIC3 0x2 0 SWRM_TX2_CH4>, + <4 DMIC4 0x3 0 SWRM_TX3_CH1>, + <4 DMIC5 0x4 0 SWRM_TX3_CH2>; + qcom,swr-tx-port-params = + , , + , , + , , + , , + , , + , , + , , + , ; + qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>; + qcom,rx-slave = <&wcd9378_rx_slave>; + qcom,tx-slave = <&wcd9378_tx_slave>; + + cdc-vdd-rxtx-supply = <&L7B>; + qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>; + qcom,cdc-vdd-rxtx-current = <30000>; + qcom,cdc-vdd-rxtx-lpm-supported = <1>; + + cdc-vdd-io-supply = <&L3G>; + qcom,cdc-vdd-io-voltage = <1200000 1200000>; + qcom,cdc-vdd-io-current = <20000>; + qcom,cdc-vdd-io-lpm-supported = <1>; + + cdc-vdd-buck-supply = <&L7B>; + qcom,cdc-vdd-buck-voltage = <1800000 1800000>; + qcom,cdc-vdd-buck-current = <30070>; + qcom,cdc-vdd-buck-lpm-supported = <1>; + + cdc-vdd-mic-bias-supply = <&BOB>; + qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; + qcom,cdc-vdd-mic-bias-current = <40550>; + + qcom,cdc-micbias1-mv = <1800>; + qcom,cdc-micbias2-mv = <1800>; + qcom,cdc-micbias3-mv = <1800>; + + qcom,cdc-static-supplies = "cdc-vdd-rxtx", + "cdc-vdd-io"; + qcom,cdc-on-demand-supplies = "cdc-vdd-buck"; + }; +}; + +&lpass_bt_swr { + clock-names = "bt_swr_mclk_clk", "bt_swr_mclk_clk_2x", + "lpass_core_hw_vote", "lpass_audio_hw_vote"; + clocks = <&clock_audio_bt_swr_mclk_clk 0>, + <&clock_audio_bt_swr_mclk_clk_2x 0>, + <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + qcom,bt-swr-gpios = <&bt_swr_gpios>; +}; + +&swr4 { + compatible = "qcom,swr-mstr"; + qcom,swr_master_id = <5>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + swrm-io-base = <0x06CA0000 0x0>; + interrupts = ; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <7>; + qcom,swr-port-mapping = <1 BT_AUDIO_RX1 0x3>, + <2 BT_AUDIO_RX2 0x3>, <3 BT_AUDIO_RX3 0x3>, + <5 BT_AUDIO_TX1 0x3>, <6 BT_AUDIO_TX2 0x3>, + <7 BT_AUDIO_TX3 0x3>, <8 FM_AUDIO_TX1 0x3>; + qcom,swr-num-dev = <1>; +}; + +&spf_core_platform { + kera_snd: sound { + qcom,model = "kera-qrd-snd-card"; + qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; + qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; + qcom,wcn-bt = <0>; + qcom,ext-disp-audio-rx = <0>; + qcom,tdm-max-slots = <8>; + qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,audio-core-list = <0>, <1>; + qcom,audio-routing = + "AMIC1", "Analog Mic1", + "AMIC1", "MIC BIAS1", + "AMIC2", "Analog Mic2", + "AMIC2", "MIC BIAS2", + "AMIC3", "Analog Mic3", + "AMIC3", "MIC BIAS3", + "AMIC4", "Analog Mic4", + "AMIC4", "MIC BIAS1", + "VA AMIC1", "Analog Mic1", + "VA AMIC1", "VA MIC BIAS1", + "VA AMIC2", "Analog Mic2", + "VA AMIC2", "VA MIC BIAS2", + "VA AMIC3", "Analog Mic3", + "VA AMIC3", "VA MIC BIAS3", + "VA AMIC4", "Analog Mic4", + "VA AMIC4", "VA MIC BIAS1", + "TX DMIC0", "Digital Mic0", + "TX DMIC0", "MIC BIAS3", + "TX DMIC1", "Digital Mic1", + "TX DMIC1", "MIC BIAS3", + "TX DMIC2", "Digital Mic2", + "TX DMIC2", "MIC BIAS1", + "TX DMIC3", "Digital Mic3", + "TX DMIC3", "MIC BIAS1", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrRight IN", "WSA_SPK2 OUT", + "VA SWR_INPUT", "VA_SWR_CLK", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd9378_codec>, <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd9378_codec", "wsa-codec2"; + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; + qcom,wsa-max-devs = <1>; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, + <&lpass_cdc>, <&lpass_bt_swr>; + + }; + + cdc_pri_mi2s_gpios: pri_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&i2s0_sck_active &i2s0_ws_active + &i2s0_sd0_active &i2s0_sd1_active>; + pinctrl-1 = <&i2s0_sck_sleep &i2s0_ws_sleep + &i2s0_sd0_sleep &i2s0_sd1_sleep>; + #gpio-cells = <0>; + }; + + cdc_quat_mi2s_gpios: quat_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&quat_mi2s_sck_active &quat_mi2s_ws_active + &quat_mi2s_sd0_active &quat_mi2s_sd1_active + &quat_mi2s_sd2_active &quat_mi2s_sd3_active>; + pinctrl-1 = <&quat_mi2s_sck_sleep &quat_mi2s_ws_sleep + &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep + &quat_mi2s_sd2_sleep &quat_mi2s_sd3_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <138 143>; + #gpio-cells = <0>; + }; + + cdc_quin_mi2s_gpios: quin_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s1_sck_active &lpi_i2s1_ws_active + &lpi_i2s1_data0_active &lpi_i2s1_data1_active>; + pinctrl-1 = <&lpi_i2s1_sck_sleep &lpi_i2s1_ws_sleep + &lpi_i2s1_data0_sleep &lpi_i2s1_data1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <144 147>; + #gpio-cells = <0>; + }; + + cdc_sen_mi2s_gpios: sen_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s2_sck_active &lpi_i2s2_ws_active + &lpi_i2s2_data0_active &lpi_i2s2_data1_active>; + pinctrl-1 = <&lpi_i2s2_sck_sleep &lpi_i2s2_ws_sleep + &lpi_i2s2_data0_sleep &lpi_i2s2_data1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <148 151>; + #gpio-cells = <0>; + }; + + cdc_sep_mi2s_gpios: sep_mi2s_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&lpi_i2s3_sck_active &lpi_i2s3_ws_active + &lpi_i2s3_data0_active &lpi_i2s3_data1_active>; + pinctrl-1 = <&lpi_i2s3_sck_sleep &lpi_i2s3_ws_sleep + &lpi_i2s3_data0_sleep &lpi_i2s3_data1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <153 156>; + #gpio-cells = <0>; + }; + + wsa_swr_gpios: wsa_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wsa_swr_clk_active &wsa_swr_data_active>; + pinctrl-1 = <&wsa_swr_clk_sleep &wsa_swr_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <149>; + #gpio-cells = <0>; + }; + + rx_swr_gpios: rx_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active + &rx_swr_data1_active>; + pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep + &rx_swr_data1_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <142>; + #gpio-cells = <0>; + }; + + va_swr_gpios: tx_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&tx_swr_clk_active &tx_swr_data0_active + &tx_swr_data1_active &tx_swr_data2_active>; + pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data0_sleep + &tx_swr_data1_sleep &tx_swr_data2_sleep>; + qcom,lpi-gpios; + qcom,chip-wakeup-reg = <0xf18b008>; + qcom,chip-wakeup-maskbit = <7>; + qcom,chip-wakeup-default-val = <0x1>; + qcom,tlmm-pins = <139>; + #gpio-cells = <0>; + }; + + cdc_dmic01_gpios: cdc_dmic01_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>; + pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <144 145>; + #gpio-cells = <0>; + }; + + cdc_dmic23_gpios: cdc_dmic23_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>; + pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <146 147>; + #gpio-cells = <0>; + }; + + cdc_dmic45_gpios: cdc_dmic45_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic45_clk_active &cdc_dmic45_data_active>; + pinctrl-1 = <&cdc_dmic45_clk_sleep &cdc_dmic45_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <150 151>; + #gpio-cells = <0>; + }; + + cdc_dmic67_gpios: cdc_dmic67_pinctrl { + status = "disabled"; + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic67_clk_active &cdc_dmic67_data_active>; + pinctrl-1 = <&cdc_dmic67_clk_sleep &cdc_dmic67_data_sleep>; + qcom,lpi-gpios; + qcom,tlmm-pins = <155 156>; + #gpio-cells = <0>; + }; + + bt_swr_gpios: bt_swr_clk_data_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&bt_swr_clk_active &bt_swr_data_active>; + pinctrl-1 = <&bt_swr_clk_sleep &bt_swr_data_sleep>; + qcom,lpi-gpios; + #gpio-cells = <0>; + }; +}; + +&soc { + wsa_spkr_en02: wsa_spkr_en1_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&spkr_1_sd_n_active>; + pinctrl-1 = <&spkr_1_sd_n_sleep>; + qcom,lpi-gpios; + }; + + wsa_spkr_en13: wsa_spkr_en2_pinctrl { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&spkr_2_sd_n_active>; + pinctrl-1 = <&spkr_2_sd_n_sleep>; + qcom,lpi-gpios; + }; + + wcd_rst_gpio: msm_cdc_pinctrl@32 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd_reset_active>; + pinctrl-1 = <&wcd_reset_sleep>; + }; + + clock_audio_va_1: va_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x307>; + #clock-cells = <1>; + }; + + clock_audio_wsa_1: wsa_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x309>; + #clock-cells = <1>; + }; + + clock_audio_rx_1: rx_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <22579200>; + qcom,codec-lpass-clk-id = <0x30E>; + #clock-cells = <1>; + }; + + clock_audio_rx_tx: rx_core_tx_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x312>; + #clock-cells = <1>; + }; + + clock_audio_tx_1: tx_core_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x30C>; + #clock-cells = <1>; + }; + + clock_audio_wsa_tx: wsa_core_tx_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x314>; + #clock-cells = <1>; + }; + + clock_audio_rx_mclk2_2x_clk: rx_mclk2_2x_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <19200000>; + qcom,codec-lpass-clk-id = <0x318>; + #clock-cells = <1>; + }; + + clock_audio_bt_swr_mclk_clk: bt_swr_mclk_clk { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <24576000>; + qcom,codec-lpass-clk-id = <0x31A>; + #clock-cells = <1>; + }; + + clock_audio_bt_swr_mclk_clk_2x: bt_swr_mclk_clk_2x { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + qcom,codec-lpass-ext-clk-freq = <24576000>; + qcom,codec-lpass-clk-id = <0x31B>; + #clock-cells = <1>; + }; +}; + +&adsp_loader { + status = "ok"; +}; diff --git a/kera-audio-qrd.dts b/kera-audio-qrd.dts new file mode 100644 index 00000000..4160a838 --- /dev/null +++ b/kera-audio-qrd.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Kera QRD"; + compatible = "qcom,kera-qrd", "qcom,kera", "qcom,kerap-qrd", "qcom,kerap", + "qcom,qrd"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x1000B 0>, <0x2000B 0>, <0x3000B 0>; +}; diff --git a/kera-audio-qrd.dtsi b/kera-audio-qrd.dtsi new file mode 100644 index 00000000..9768b064 --- /dev/null +++ b/kera-audio-qrd.dtsi @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +#include "kera-audio-overlay.dtsi" +#include "kera-audio-lpass-reg.dtsi" + +&tx_swr_clk_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data0_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data1_active { + config { + drive-strength = <2>; + }; +}; + +&tx_swr_data2_active { + config { + drive-strength = <2>; + }; +}; + +&wsa_swr { + wsa884x_0220: wsa884x@02170220 { + status = "disabled"; + }; + + wsa884x_0221: wsa884x@02170221 { + status = "okay"; + }; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs = <1>, <1>; +}; + +&wcd939x_rx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "disabled"; +}; + +&wcd939x_codec { + status = "disabled"; +}; + +&cdc_dmic01_gpios { + status = "disabled"; +}; + +&cdc_dmic23_gpios { + status = "disabled"; +}; + +&wcd9378_codec { + status = "okay"; +}; + +&wcd9378_rx_slave { + status = "okay"; +}; + +&wcd9378_tx_slave { + status = "okay"; +}; + +&kera_snd { + qcom,model = "kera-qrd-snd-card"; + asoc-codec = <&stub_codec>, <&lpass_cdc>, + <&wcd9378_codec>, <&wsa884x_0221>; + asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", + "wcd9378_codec", "wsa-codec2"; + qcom,wsa-max-devs = <1>; +}; diff --git a/kera-audio-rcm.dts b/kera-audio-rcm.dts new file mode 100644 index 00000000..58caf16c --- /dev/null +++ b/kera-audio-rcm.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "kera-audio-cdp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Kuna RCM"; + compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap", + "qcom,rcm"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0x10015 0>, <0x20015 0>, <0x30015 0>, <0x30015 1>, + <0x10015 1>, <0x20015 1>; +}; diff --git a/kera-audio.dts b/kera-audio.dts new file mode 100644 index 00000000..f9fd3d51 --- /dev/null +++ b/kera-audio.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "kera-audio.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kera"; + compatible = "qcom,kera"; + qcom,msm-id = <686 0x10000>, <659 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/kera-audio.dtsi b/kera-audio.dtsi new file mode 100644 index 00000000..16d1110e --- /dev/null +++ b/kera-audio.dtsi @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include "msm-audio-lpass.dtsi" + +&soc { + spf_core_platform: spf_core_platform { + compatible = "qcom,spf-core-platform"; + }; + + lpass_core_hw_vote: vote_lpass_core_hw { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + #clock-cells = <1>; + }; + + lpass_audio_hw_vote: vote_lpass_audio_hw { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = ; + #clock-cells = <1>; + }; +}; + +&remoteproc_adsp_glink { + audio_gpr: qcom,gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,intents = <0x200 20>; + qcom,ch-sched-rt; + reg = ; + + spf_core { + compatible = "qcom,spf_core"; + reg = ; + }; + + audio-pkt { + compatible = "qcom,audio-pkt"; + qcom,audiopkt-ch-name = "apr_audio_svc"; + reg = ; + }; + + audio_prm: q6prm { + compatible = "qcom,audio_prm"; + qcom,sleep-api-supported = <1>; + reg = ; + }; + }; +}; + +&spf_core_platform { + + msm_audio_ion: qcom,msm-audio-ion { + compatible = "qcom,msm-audio-ion"; + qcom,smmu-version = <2>; + qcom,smmu-enabled; + iommus = <&apps_smmu 0x1001 0x0080>, <&apps_smmu 0x1041 0x20>; + memory-region = <&audio_cnss_resv_region>; + qcom,smmu-sid-mask = /bits/ 64 <0xf>; + dma-coherent; + + audio_cnss_resv_region: audio_cnss_resv_region { + iommu-addresses = <&msm_audio_ion 0x00000000 0x18000000>, + <&msm_audio_ion 0xb0000000 0x50000000>; + }; + }; + + msm_audio_ion_cma: qcom,msm-audio-ion-cma { + compatible = "qcom,msm-audio-ion-cma"; + }; + + lpi_tlmm: lpi_pinctrl@07760000 { + compatible = "qcom,lpi-pinctrl"; + reg = <0x07760000 0x0>; + qcom,gpios-count = <23>; + qcom,slew-reg = <0x07760000 0x0>; + gpio-controller; + #gpio-cells = <2>; + qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>, + <0x00002000>, <0x00003000>, + <0x00004000>, <0x00005000>, + <0x00006000>, <0x00007000>, + <0x00008000>, <0x00009000>, + <0x0000A000>, <0x0000B000>, + <0x0000C000>, <0x0000D000>, + <0x0000E000>, <0x0000F000>, + <0x00010000>, <0x00011000>, + <0x00012000>, <0x00013000>, + <0x00014000>, <0x00015000>, + <0x00016000>; + qcom,lpi-slew-offset-tbl = <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>, <0x0000000B>, + <0x0000000B>; + + qcom,lpi-slew-base-tbl = <0x7760000>, <0x7761000>, + <0x7762000>, <0x7763000>, + <0x7764000>, <0x7765000>, + <0x7766000>, <0x7767000>, + <0x7768000>, <0x7769000>, + <0x776A000>, <0x776B000>, + <0x776C000>, <0x776D000>, + <0x776E000>, <0x776F000>, + <0x7770000>, <0x7771000>, + <0x7772000>, <0x7773000>, + <0x7774000>, <0x7775000>, + <0x7776000>; + + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + }; + + lpass_cdc: lpass-cdc { + compatible = "qcom,lpass-cdc"; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote 0>, + <&lpass_audio_hw_vote 0>; + lpass-cdc-clk-rsc-mngr { + compatible = "qcom,lpass-cdc-clk-rsc-mngr"; + }; + + va_macro: va-macro@7660000 { + tx_swr: va_swr_master { + }; + }; + + tx_macro: tx-macro@6AE0000 { + }; + + rx_macro: rx-macro@6AC0000 { + rx_swr: rx_swr_master { + }; + }; + + wsa_macro: wsa-macro@6B00000 { + wsa_swr: wsa_swr_master { + }; + }; + + }; + + lpass_bt_swr: lpass_bt_swr@6CA0000 { + compatible = "qcom,lpass-bt-swr"; + swr4: bt_swr_mstr { + }; + }; + + kera_snd: sound { + compatible = "qcom,sun-asoc-snd"; + qcom,mi2s-audio-intf = <1>; + qcom,tdm-audio-intf = <0>; + qcom,auxpcm-audio-intf = <1>; + qcom,wcn-bt = <0>; + qcom,ext-disp-audio-rx = <0>; + qcom,afe-rxtx-lb = <0>; + + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + }; +}; + +&aliases { + wsa_swr = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; + rx_swr = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; + tx_swr = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; + swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; +}; + +&adsp_loader { + /delete-property/ qcom,adsp-state; +}; diff --git a/kera-lpi.dtsi b/kera-lpi.dtsi new file mode 100644 index 00000000..ebf2e7b9 --- /dev/null +++ b/kera-lpi.dtsi @@ -0,0 +1,2189 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&lpi_tlmm { + quat_mi2s_sck { + quat_mi2s_sck_sleep: quat_mi2s_sck_sleep { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sck_active: quat_mi2s_sck_active { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_ws { + quat_mi2s_ws_sleep: quat_mi2s_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_ws_active: quat_mi2s_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd0 { + quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd0_active: quat_mi2s_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd1 { + quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd1_active: quat_mi2s_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd2 { + quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd2_active: quat_mi2s_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd3 { + quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd3_active: quat_mi2s_sd3_active { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sck { + lpi_i2s1_sck_sleep: lpi_i2s1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sck_active: lpi_i2s1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_ws { + lpi_i2s1_ws_sleep: lpi_i2s1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_ws_active: lpi_i2s1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sd0 { + lpi_i2s1_data0_sleep: lpi_i2s1_data0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_data0_active: lpi_i2s1_data0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + + lpi_i2s1_sd1 { + lpi_i2s1_data1_active: lpi_i2s1_data1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s1_data1_sleep: lpi_i2s1_data1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + lpi_i2s2_sck { + lpi_i2s2_sck_active: lpi_i2s2_sck_active { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + + lpi_i2s2_sck_sleep: lpi_i2s2_sck_sleep { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s2_ws { + lpi_i2s2_ws_active: lpi_i2s2_ws_active { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s2_ws_sleep: lpi_i2s2_ws_sleep { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + }; + + + lpi_i2s2_sd0 { + lpi_i2s2_data0_active: lpi_i2s2_data0_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + + lpi_i2s2_data0_sleep: lpi_i2s2_data0_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + }; + + + lpi_i2s2_sd1 { + lpi_i2s2_data1_active: lpi_i2s2_data1_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s2_data1_sleep: lpi_i2s2_data1_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s3_sck { + lpi_i2s3_sck_active: lpi_i2s3_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s3_sck_sleep: lpi_i2s3_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s3_ws { + lpi_i2s3_ws_active: lpi_i2s3_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s3_ws_sleep: lpi_i2s3_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s3_sd0 { + lpi_i2s3_data0_active: lpi_i2s3_data0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s3_data0_sleep: lpi_i2s3_data0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + lpi_i2s3_sd1 { + lpi_i2s3_data1_active: lpi_i2s3_data1_active { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + + }; + }; + + lpi_i2s3_data1_sleep: lpi_i2s3_data1_sleep { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + + }; + }; + }; + + + quat_tdm_ws { + quat_tdm_ws_sleep: quat_tdm_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_ws_active: quat_tdm_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + quat_tdm_sd0 { + quat_tdm_sd0_sleep: quat_tdm_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd0_active: quat_tdm_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + quat_tdm_sd1 { + quat_tdm_sd1_sleep: quat_tdm_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd1_active: quat_tdm_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + quat_tdm_sd2 { + quat_tdm_sd2_sleep: quat_tdm_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd2_active: quat_tdm_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + quat_tdm_sd3 { + quat_tdm_sd3_sleep: quat_tdm_sd3_sleep { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd3_active: quat_tdm_sd3_active { + mux { + pins = "gpio5"; + function = "func3"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm1_sck { + lpi_tdm1_sck_sleep: lpi_tdm1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sck_active: lpi_tdm1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm1_ws { + lpi_tdm1_ws_sleep: lpi_tdm1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_ws_active: lpi_tdm1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm1_sd0 { + lpi_tdm1_sd0_sleep: lpi_tdm1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sd0_active: lpi_tdm1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm1_sd1 { + lpi_tdm1_sd1_sleep: lpi_tdm1_sd1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sd1_active: lpi_tdm1_sd1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm2_sck { + lpi_tdm2_sck_sleep: lpi_tdm2_sck_sleep { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sck_active: lpi_tdm2_sck_active { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_ws { + lpi_tdm2_ws_sleep: lpi_tdm2_ws_sleep { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_ws_active: lpi_tdm2_ws_active { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_sd0 { + lpi_tdm2_sd0_sleep: lpi_tdm2_sd0_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sd0_active: lpi_tdm2_sd0_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_tdm2_sd1 { + lpi_tdm2_sd1_sleep: lpi_tdm2_sd1_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sd1_active: lpi_tdm2_sd1_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sck { + lpi_tdm3_sck_sleep: lpi_tdm3_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sck_active: lpi_tdm3_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_ws { + lpi_tdm3_ws_sleep: lpi_tdm3_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_ws_active: lpi_tdm3_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sd0 { + lpi_tdm3_sd0_sleep: lpi_tdm3_sd0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sd0_active: lpi_tdm3_sd0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm3_sd1 { + lpi_tdm3_sd1_sleep: lpi_tdm3_sd3_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm3_sd1_active: lpi_tdm3_sd1_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sck { + quat_aux_sck_sleep: quat_aux_sck_sleep { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sck_active: quat_aux_sck_active { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_ws { + quat_aux_ws_sleep: quat_aux_ws_sleep { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_ws_active: quat_aux_ws_active { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd0 { + quat_aux_sd0_sleep: quat_aux_sd0_sleep { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd0_active: quat_aux_sd0_active { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd1 { + quat_aux_sd1_sleep: quat_aux_sd1_sleep { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd1_active: quat_aux_sd1_active { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd2 { + quat_aux_sd2_sleep: quat_aux_sd2_sleep { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd2_active: quat_aux_sd2_active { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd3 { + quat_aux_sd3_sleep: quat_aux_sd3_sleep { + mux { + pins = "gpio5"; + function = "func2"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd3_active: quat_aux_sd3_active { + mux { + pins = "gpio5"; + function = "func2"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sck { + lpi_aux1_sck_sleep: lpi_aux1_sck_sleep { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sck_active: lpi_aux1_sck_active { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_ws { + lpi_aux1_ws_sleep: lpi_aux1_ws_sleep { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_ws_active: lpi_aux1_ws_active { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sd0 { + lpi_aux1_sd0_sleep: lpi_aux1_sd0_sleep { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sd0_active: lpi_aux1_sd0_active { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sd1 { + lpi_aux1_sd1_sleep: lpi_aux1_sd1_sleep { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sd1_active: lpi_aux1_sd1_active { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux2_sck { + lpi_aux2_sck_sleep: lpi_aux2_sck_sleep { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sck_active: lpi_aux2_sck_active { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_ws { + lpi_aux2_ws_sleep: lpi_aux2_ws_sleep { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_ws_active: lpi_aux2_ws_active { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_sd0 { + lpi_aux2_sd0_sleep: lpi_aux2_sd0_sleep { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sd0_active: lpi_aux2_sd0_active { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux2_sd1 { + lpi_aux2_sd1_sleep: lpi_aux2_sd1_sleep { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sd1_active: lpi_aux2_sd1_active { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux3_sck { + lpi_aux3_sck_sleep: lpi_aux3_sck_sleep { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sck_active: lpi_aux3_sck_active { + mux { + pins = "gpio19"; + function = "func1"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux3_ws { + lpi_aux3_ws_sleep: lpi_aux3_ws_sleep { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_ws_active: lpi_aux3_ws_active { + mux { + pins = "gpio20"; + function = "func1"; + }; + + config { + pins = "gpio20"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux3_sd0 { + lpi_aux3_sd0_sleep: lpi_aux3_sd0_sleep { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sd0_active: lpi_aux3_sd0_active { + mux { + pins = "gpio21"; + function = "func1"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + + lpi_aux3_sd1 { + lpi_aux3_sd1_sleep: lpi_aux3_sd1_sleep { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux3_sd1_active: lpi_aux3_sd1_active { + mux { + pins = "gpio22"; + function = "func1"; + }; + + config { + pins = "gpio22"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + bt_swr_clk_pin { + bt_swr_clk_sleep: bt_swr_clk_sleep { + mux { + pins = "gpio19"; + function = "func3"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + bt_swr_clk_active: bt_swr_clk_active { + mux { + pins = "gpio19"; + function = "func3"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + }; + + bt_swr_data_pin { + bt_swr_data_sleep: bt_swr_data_sleep { + mux { + pins = "gpio20"; + function = "func3"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + bt_swr_data_active: bt_swr_data_active { + mux { + pins = "gpio20"; + function = "func3"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + }; + + tx_swr_clk_active: tx_swr_clk_active { + mux { + pins = "gpio0"; + function = "func1"; + + }; + + config { + pins = "gpio0"; + drive-strength = <4>; + slew-rate = <1>; + bias-disable; + }; + }; + + tx_swr_clk_sleep: tx_swr_clk_sleep { + mux { + pins = "gpio0"; + function = "func1"; + input-enable; + bias-pull-down; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; + + }; + }; + + tx_swr_data0_active: tx_swr_data0_active { + mux { + pins = "gpio1"; + function = "func1"; + }; + + config { + pins = "gpio1"; + drive-strength = <4>; + slew-rate = <1>; + bias-disable; + + }; + }; + + tx_swr_data0_sleep: tx_swr_data0_sleep { + mux { + pins = "gpio1"; + function = "func1"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; + input-enable; + bias-bus-hold; + + }; + }; + + tx_swr_data1_active: tx_swr_data1_active { + mux { + pins = "gpio2"; + function = "func1"; + }; + + config { + pins = "gpio2"; + drive-strength = <4>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + tx_swr_data1_sleep: tx_swr_data1_sleep { + mux { + pins = "gpio2"; + function = "func1"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + tx_swr_data2_active: tx_swr_data2_active { + mux { + pins = "gpio14"; + function = "func1"; + }; + + config { + pins = "gpio14"; + drive-strength = <4>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + tx_swr_data2_sleep: tx_swr_data2_sleep { + mux { + pins = "gpio14"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + rx_swr_clk_active: rx_swr_clk_active { + mux { + pins = "gpio3"; + function = "func1"; + + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + + rx_swr_clk_sleep: rx_swr_clk_sleep { + mux { + pins = "gpio3"; + function = "func1"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + input-enable; + bias-pull-down; + + }; + }; + + rx_swr_data_active: rx_swr_data_active { + mux { + pins = "gpio4"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + + }; + }; + + rx_swr_data_sleep: rx_swr_data_sleep { + mux { + pins = "gpio4"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + input-enable; + bias-pull-down; + + }; + }; + + rx_swr_data1_active: rx_swr_data1_active { + mux { + pins = "gpio5"; + function = "func1"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + + }; + }; + + rx_swr_data1_sleep: rx_swr_data1_sleep { + mux { + pins = "gpio5"; + function = "func1"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + input-enable; + bias-pull-down; + + }; + }; + + cdc_dmic01_clk_active: dmic01_clk_active { + mux { + pins = "gpio6"; + function = "func1"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic01_clk_sleep: dmic01_clk_sleep { + mux { + pins = "gpio6"; + function = "func1"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic01_data_active: dmic01_data_active { + mux { + pins = "gpio7"; + function = "func1"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic01_data_sleep: dmic01_data_sleep { + mux { + pins = "gpio7"; + function = "func1"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic23_clk_active: dmic23_clk_active { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic23_clk_sleep: dmic23_clk_sleep { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic23_data_active: dmic23_data_active { + mux { + pins = "gpio9"; + function = "func1"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic23_data_sleep: dmic23_data_sleep { + mux { + pins = "gpio9"; + function = "func1"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic45_clk_active: cdc_dmic45_clk_active { + mux { + pins = "gpio12"; + function = "func1"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic45_clk_sleep: lpi_dmic45_clk_sleep { + mux { + pins = "gpio12"; + function = "func1"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic45_data_active: cdc_dmic45_data_active { + mux { + pins = "gpio13"; + function = "func1"; + }; + + config { + pins ="gpio13"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic45_data_sleep: cdc_dmic45_data_sleep { + mux { + pins = "gpio13"; + function = "func1"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; + pull-down; + input-enable; + + }; + }; + + cdc_dmic67_clk_active: cdc_dmic67_clk_active { + mux { + pins = "gpio21"; + function = "func2"; + }; + + config { + pins = "gpio21"; + drive-strength = <8>; + input-enable; + + }; + }; + + cdc_dmic67_clk_sleep: lpi_dmic67_clk_sleep { + mux { + pins = "gpio21"; + function = "func2"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; + pull-down; + input-enable; + + }; + }; + + cdc_dmic67_data_active: cdc_dmic67_data_active { + mux { + pins = "gpio22"; + function = "func2"; + }; + + config { + pins ="gpio22"; + drive-strength = <8>; + input-enable; + + + }; + }; + + cdc_dmic67_data_sleep: cdc_dmic67_data_sleep { + mux { + pins = "gpio22"; + function = "func2"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; + pull-down; + input-enable; + + }; + }; + + + wsa_swr_clk_pin { + wsa_swr_clk_sleep: wsa_swr_clk_sleep { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa_swr_clk_active: wsa_swr_clk_active { + mux { + pins = "gpio10"; + function = "func1"; + + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + }; + + wsa_swr_data_pin { + wsa_swr_data_active: wsa_swr_data_active { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + + }; + }; + + wsa_swr_data_sleep: wsa_swr_data_sleep { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + }; + +}; From 2a172de4f4ae27becdf296923da8eec90a6bac65 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 13 Nov 2024 19:44:36 +0530 Subject: [PATCH 06/18] ARM: dts: msm: comment BOB and usbss Need to revert once kernel changes are in place. Change-Id: I96caf7ca9b78421b9c25b6ddc5ef6fd2a71b9d9a Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-mtp.dtsi | 2 +- kera-audio-overlay.dtsi | 4 ++-- kera-audio.dtsi | 12 ++++++------ 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi index 0c0647b0..a7ec11dd 100644 --- a/kera-audio-mtp.dtsi +++ b/kera-audio-mtp.dtsi @@ -156,7 +156,7 @@ swr-haptics-unsupported; qcom,pri_mi2s_gpios = <&cdc_pri_mi2s_gpios>; qcom,wcd-disable-legacy-surge; - wcd939x-i2c-handle = <&wcd_usbss>; + //wcd939x-i2c-handle = <&wcd_usbss>; qcom,msm-mbhc-usbc-audio-supported = <0>; qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index e71a94f5..f5034250 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -284,7 +284,7 @@ qcom,cdc-vdd-buck-current = <650000>; qcom,cdc-vdd-buck-lpm-supported = <1>; - cdc-vdd-mic-bias-supply = <&BOB>; + //cdc-vdd-mic-bias-supply = <&BOB>; qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; qcom,cdc-vdd-mic-bias-current = <30000>; @@ -370,7 +370,7 @@ qcom,cdc-vdd-buck-current = <30070>; qcom,cdc-vdd-buck-lpm-supported = <1>; - cdc-vdd-mic-bias-supply = <&BOB>; + // cdc-vdd-mic-bias-supply = <&BOB>; qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; qcom,cdc-vdd-mic-bias-current = <40550>; diff --git a/kera-audio.dtsi b/kera-audio.dtsi index 16d1110e..e289da53 100644 --- a/kera-audio.dtsi +++ b/kera-audio.dtsi @@ -174,12 +174,12 @@ }; }; -&aliases { - wsa_swr = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; - rx_swr = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; - tx_swr = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; - swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; -}; +//&aliases { +// wsa_swr = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; +// rx_swr = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; +// tx_swr = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; +// swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; +//}; &adsp_loader { /delete-property/ qcom,adsp-state; From d0f9127d366dc44075e3f6b7f9f34f3884f342a9 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Fri, 15 Nov 2024 22:35:35 +0530 Subject: [PATCH 07/18] ARM: dts: msm: Add support for TunaP -Add missing APQ SOC_ID in tuna. Change-Id: Ibc5e8a54775dc142eb4e26f503f507c3eed1b32a Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tuna-audio.dts b/tuna-audio.dts index a56067d5..b471b9a2 100644 --- a/tuna-audio.dts +++ b/tuna-audio.dts @@ -16,6 +16,6 @@ / { model = "Qualcomm Technologies, Inc. tuna"; compatible = "qcom,tuna"; - qcom,msm-id = <681 0x10000>, <655 0x10000>; + qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>; qcom,board-id = <0 0>; }; From 7c94129cdd56634e1310888a3ae9700d7019935f Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 18 Nov 2024 22:10:05 +0530 Subject: [PATCH 08/18] ARM: dts: msm: Add WCD tx rx slaves -Enable wcd tx and rx slave nodes. Change-Id: If41125b672fdbb18a90192bfc8170642c1974d2d Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-cdp.dtsi | 16 ++++++++++++++++ tuna-audio-qrd.dtsi | 24 ++++++++++++++++++++---- 2 files changed, 36 insertions(+), 4 deletions(-) diff --git a/tuna-audio-cdp.dtsi b/tuna-audio-cdp.dtsi index 1f254184..31e7cff7 100644 --- a/tuna-audio-cdp.dtsi +++ b/tuna-audio-cdp.dtsi @@ -33,10 +33,26 @@ status = "disabled"; }; +&wcd9378_rx_slave { + status = "disabled"; +}; + +&wcd9378_tx_slave { + status = "disabled"; +}; + &wcd939x_codec { status = "okay"; }; +&wcd939x_tx_slave { + status = "okay"; +}; + +&wcd939x_rx_slave { + status = "okay"; +}; + &swr0 { wsa884x_0220: wsa884x@02170220 { status = "okay"; diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index 5cb9ac46..da712522 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -39,14 +39,30 @@ }; }; -&wsa_macro { - qcom,wsa-bat-cfgs = <1>, <1>; -}; - &wcd9378_codec { status = "disabled"; }; +&wcd9378_rx_slave { + status = "disabled"; +}; + +&wcd9378_tx_slave { + status = "disabled"; +}; + +&wcd939x_tx_slave { + status = "okay"; +}; + +&wcd939x_rx_slave { + status = "okay"; +}; + +&wsa_macro { + qcom,wsa-bat-cfgs = <1>, <1>; +}; + &wcd939x_codec { status = "okay"; /* 0 for digital crosstalk disabled, From b92f7fda3b9501dbf22c2babbe11316403d26a9c Mon Sep 17 00:00:00 2001 From: Kisan Yadav Date: Wed, 20 Nov 2024 14:25:31 +0530 Subject: [PATCH 09/18] ARM: dts: msm: Remove amic5 entries from tuna overlay - Remove amic5 entries from tuna overlay as only 4 mics are supported in tuna wcd codecs Change-Id: I0d3159a67c288f4ee61613ec291c274a8c2325a1 Signed-off-by: Kisan Yadav --- tuna-audio-overlay.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index 882dcfe8..80f7fbb9 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -440,8 +440,6 @@ "AMIC3", "MIC BIAS3", "AMIC4", "Analog Mic4", "AMIC4", "MIC BIAS3", - "AMIC5", "Analog Mic5", - "AMIC5", "MIC BIAS4", "VA AMIC1", "Analog Mic1", "VA AMIC1", "VA MIC BIAS1", "VA AMIC2", "Analog Mic2", @@ -450,8 +448,6 @@ "VA AMIC3", "VA MIC BIAS3", "VA AMIC4", "Analog Mic4", "VA AMIC4", "VA MIC BIAS3", - "VA AMIC5", "Analog Mic5", - "VA AMIC5", "VA MIC BIAS4", "TX DMIC0", "Digital Mic0", "TX DMIC0", "MIC BIAS3", "TX DMIC1", "Digital Mic1", From 5f8b3ca52493e7f79896bad7601f36753aa181b2 Mon Sep 17 00:00:00 2001 From: Yuhui Zhao Date: Wed, 20 Nov 2024 19:27:25 +0800 Subject: [PATCH 10/18] ARM: dts: msm: Disable swr haptics for qrd -Disable swr haptics for qrd. Change the wsa-codec index from 2 to 1. and connect WSA_SPK1 OUT instead of WSA_SPK2 OUT change the prefix of wsa as SpkrLeft. Change-Id: I99ac02d92326641432011a8fe88c41dd52d03f3b Signed-off-by: Yuhui Zhao --- tuna-audio-qrd.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/tuna-audio-qrd.dtsi b/tuna-audio-qrd.dtsi index da712522..4c238157 100644 --- a/tuna-audio-qrd.dtsi +++ b/tuna-audio-qrd.dtsi @@ -30,7 +30,7 @@ &swr0 { wsa884x_0220: wsa884x@02170220 { qcom,spkr-sd-n-node = <&wsa_spkr_en13>; - sound-name-prefix = "SpkrRight"; + sound-name-prefix = "SpkrLeft"; status = "okay"; }; @@ -91,6 +91,7 @@ &tuna_snd { qcom,model = "tuna-qrd-snd-card"; + swr-haptics-unsupported; qcom,audio-routing = "AMIC1", "Analog Mic1", "AMIC1", "MIC BIAS1", @@ -118,7 +119,7 @@ "RX_TX DEC1_INP", "TX DEC1 MUX", "RX_TX DEC2_INP", "TX DEC2 MUX", "RX_TX DEC3_INP", "TX DEC3 MUX", - "SpkrRight IN", "WSA_SPK2 OUT", + "SpkrLeft IN", "WSA_SPK1 OUT", "TX SWR_INPUT", "WCD_TX_OUTPUT", "VA SWR_INPUT", "VA_SWR_CLK", "VA SWR_INPUT", "WCD_TX_OUTPUT", @@ -128,7 +129,7 @@ asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd939x_codec>, <&wsa884x_0220>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd939x_codec", "wsa-codec2"; + "wcd939x_codec", "wsa-codec1"; qcom,wsa-max-devs = <1>; qcom,wcd-disable-legacy-surge; wcd939x-i2c-handle = <&wcd_usbss>; From 31077c7c05009f6bb590d501ba2b8d75f9f81830 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Mon, 25 Nov 2024 12:21:37 +0530 Subject: [PATCH 11/18] ARM: dts: msm: Correct GIC swr mstr interrupt Correct the GIC SWR MSTR inerrupt which is pointing to wrong pin. Update correct lpi pin. Change-Id: I0a0679cf832e357c7624ada30e5b03fa59555bce Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-overlay.dtsi | 2 +- tuna-lpi.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index 80f7fbb9..4c67e5d1 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -50,7 +50,7 @@ qcom,mipi-sdw-block-packing-mode = <1>; swrm-io-base = <0x7630000 0x0>; interrupts = - , + , ; interrupt-names = "swr_master_irq", "swr_wake_irq"; qcom,swr-wakeup-required = <1>; diff --git a/tuna-lpi.dtsi b/tuna-lpi.dtsi index ebf2e7b9..70127681 100644 --- a/tuna-lpi.dtsi +++ b/tuna-lpi.dtsi @@ -1804,7 +1804,7 @@ }; config { - pins = "gpio4"; + pins = "gpio14"; drive-strength = <2>; input-enable; bias-pull-down; From 923d910e42d3eb2e2fe63a678bbf224d0b2f6a47 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 14 Nov 2024 23:49:02 +0530 Subject: [PATCH 12/18] ARM: dts: msm: Enable BT dailinks for tuna platform Set qcom,wcn-bt flag to 1 to enable BTFM related dailinks. Change-Id: Iba9adc538fcc0f5464a85f6099779993dfa881b2 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- tuna-audio-hamilton-mtp.dtsi | 1 + tuna-audio-overlay.dtsi | 2 +- tuna-audio.dtsi | 2 +- tuna7-audio-mtp.dtsi | 1 + 4 files changed, 4 insertions(+), 2 deletions(-) diff --git a/tuna-audio-hamilton-mtp.dtsi b/tuna-audio-hamilton-mtp.dtsi index 4bb1631c..c286d3b2 100644 --- a/tuna-audio-hamilton-mtp.dtsi +++ b/tuna-audio-hamilton-mtp.dtsi @@ -12,6 +12,7 @@ &tuna_snd { qcom,model = "tuna-mtp-snd-card"; + qcom,wcn-bt = <0>; qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>, <&lpass_cdc>; }; diff --git a/tuna-audio-overlay.dtsi b/tuna-audio-overlay.dtsi index 80f7fbb9..57206484 100644 --- a/tuna-audio-overlay.dtsi +++ b/tuna-audio-overlay.dtsi @@ -425,7 +425,7 @@ qcom,model = "tuna-mtp-snd-card"; qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>; qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; qcom,ext-disp-audio-rx = <0>; qcom,tdm-max-slots = <8>; qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; diff --git a/tuna-audio.dtsi b/tuna-audio.dtsi index dfe2a8b0..ef3a9546 100644 --- a/tuna-audio.dtsi +++ b/tuna-audio.dtsi @@ -164,7 +164,7 @@ qcom,mi2s-audio-intf = <1>; qcom,tdm-audio-intf = <0>; qcom,auxpcm-audio-intf = <1>; - qcom,wcn-bt = <0>; + qcom,wcn-bt = <1>; qcom,ext-disp-audio-rx = <0>; qcom,afe-rxtx-lb = <0>; diff --git a/tuna7-audio-mtp.dtsi b/tuna7-audio-mtp.dtsi index 74de7073..befa7f72 100644 --- a/tuna7-audio-mtp.dtsi +++ b/tuna7-audio-mtp.dtsi @@ -118,4 +118,5 @@ qcom,msm-mbhc-hphl-swh = <0>; qcom,msm-mbhc-gnd-swh = <0>; qcom,msm-mbhc-hs-mic-max-threshold-mv = <1670>; + qcom,wcn-bt = <0>; }; From fded148f66caaa50b608d2c4bad4d1ec8bb0d011 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 27 Nov 2024 16:55:49 +0530 Subject: [PATCH 13/18] ARM: dts: msm: Revert BOB and usbss This change reverts the commented section of BOB and wcd_usbss as they are depended on kernel change. Change-Id: I9fad7ce9732d7ec776ee3f14142129e406398c0f Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-mtp.dtsi | 2 +- kera-audio-overlay.dtsi | 4 ++-- kera-audio.dtsi | 12 ++++++------ 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi index a7ec11dd..0c0647b0 100644 --- a/kera-audio-mtp.dtsi +++ b/kera-audio-mtp.dtsi @@ -156,7 +156,7 @@ swr-haptics-unsupported; qcom,pri_mi2s_gpios = <&cdc_pri_mi2s_gpios>; qcom,wcd-disable-legacy-surge; - //wcd939x-i2c-handle = <&wcd_usbss>; + wcd939x-i2c-handle = <&wcd_usbss>; qcom,msm-mbhc-usbc-audio-supported = <0>; qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index f5034250..e71a94f5 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -284,7 +284,7 @@ qcom,cdc-vdd-buck-current = <650000>; qcom,cdc-vdd-buck-lpm-supported = <1>; - //cdc-vdd-mic-bias-supply = <&BOB>; + cdc-vdd-mic-bias-supply = <&BOB>; qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; qcom,cdc-vdd-mic-bias-current = <30000>; @@ -370,7 +370,7 @@ qcom,cdc-vdd-buck-current = <30070>; qcom,cdc-vdd-buck-lpm-supported = <1>; - // cdc-vdd-mic-bias-supply = <&BOB>; + cdc-vdd-mic-bias-supply = <&BOB>; qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; qcom,cdc-vdd-mic-bias-current = <40550>; diff --git a/kera-audio.dtsi b/kera-audio.dtsi index e289da53..16d1110e 100644 --- a/kera-audio.dtsi +++ b/kera-audio.dtsi @@ -174,12 +174,12 @@ }; }; -//&aliases { -// wsa_swr = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; -// rx_swr = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; -// tx_swr = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; -// swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; -//}; +&aliases { + wsa_swr = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; + rx_swr = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; + tx_swr = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; + swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; +}; &adsp_loader { /delete-property/ qcom,adsp-state; From 8c9dc8e8bcf421de474949ebf6524d0e05841643 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 27 Nov 2024 18:44:26 +0530 Subject: [PATCH 14/18] ARM: dts: msm: Replace swr nodes Replace swr node with default as swr core does not detect. Change-Id: Ibe40453c70867c9687bd01ca9345dae8080bafac Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-atp.dtsi | 2 +- kera-audio-cdp.dtsi | 2 +- kera-audio-lpass-reg.dtsi | 6 +++--- kera-audio-mtp-qmp1000.dtsi | 4 ++-- kera-audio-mtp.dtsi | 4 ++-- kera-audio-overlay.dtsi | 6 +++--- kera-audio-qrd.dtsi | 2 +- kera-audio.dtsi | 12 ++++++------ 8 files changed, 19 insertions(+), 19 deletions(-) diff --git a/kera-audio-atp.dtsi b/kera-audio-atp.dtsi index 3d2cee82..4f193ac6 100644 --- a/kera-audio-atp.dtsi +++ b/kera-audio-atp.dtsi @@ -21,7 +21,7 @@ qcom,wsa-max-devs = <0>; }; -&wsa_swr { +&swr0 { qcom,swr-num-dev = <0>; }; diff --git a/kera-audio-cdp.dtsi b/kera-audio-cdp.dtsi index b14dcf5d..3bba2f68 100644 --- a/kera-audio-cdp.dtsi +++ b/kera-audio-cdp.dtsi @@ -58,7 +58,7 @@ status = "okay"; }; -&wsa_swr { +&swr0 { wsa884x_0220: wsa884x@02170220 { status = "okay"; }; diff --git a/kera-audio-lpass-reg.dtsi b/kera-audio-lpass-reg.dtsi index d42a3289..4485f758 100644 --- a/kera-audio-lpass-reg.dtsi +++ b/kera-audio-lpass-reg.dtsi @@ -6,7 +6,7 @@ reg = <0x6AC0000 0x0>; }; -&rx_swr { +&swr1 { swrm-io-base = <0x6AD0000 0x0>; interrupts = ; }; @@ -19,12 +19,12 @@ reg = <0x6B00000 0x0>; }; -&wsa_swr { +&swr0 { swrm-io-base = <0x6B10000 0x0>; interrupts = ; }; -&tx_swr { +&swr2 { reg = <0x7630000 0x0>; }; diff --git a/kera-audio-mtp-qmp1000.dtsi b/kera-audio-mtp-qmp1000.dtsi index 4d803fc7..902b1f00 100644 --- a/kera-audio-mtp-qmp1000.dtsi +++ b/kera-audio-mtp-qmp1000.dtsi @@ -5,7 +5,7 @@ #include "kera-audio-mtp.dtsi" -&rx_swr { +&swr1 { qcom,swr-num-dev = <2>; }; @@ -33,7 +33,7 @@ status = "disabled"; }; -&tx_swr { +&swr2 { qmp01: qmp@04170232 { /* * reg = ; }; -&wsa_swr { +&swr0 { qcom,swr-num-dev = <2>; }; diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index e71a94f5..8a88bbbc 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -37,7 +37,7 @@ qcom,use-clk-id = ; qcom,is-used-swr-gpio = <1>; qcom,va-swr-gpios = <&va_swr_gpios>; - tx_swr: va_swr_master { + swr2: va_swr_master { compatible = "qcom,swr-mstr"; #address-cells = <2>; #size-cells = <0>; @@ -93,7 +93,7 @@ qcom,default-clk-id = ; clock-names = "rx_mclk2_2x_clk"; clocks = <&clock_audio_rx_mclk2_2x_clk 0>; - rx_swr: rx_swr_master { + swr1: rx_swr_master { compatible = "qcom,swr-mstr"; #address-cells = <2>; #size-cells = <0>; @@ -152,7 +152,7 @@ qcom,thermal-max-state = <11>; qcom,noise-gate-mode = <2>; #cooling-cells = <2>; - wsa_swr: wsa_swr_master { + swr0: wsa_swr_master { compatible = "qcom,swr-mstr"; #address-cells = <2>; #size-cells = <0>; diff --git a/kera-audio-qrd.dtsi b/kera-audio-qrd.dtsi index 9768b064..0afe6dc6 100644 --- a/kera-audio-qrd.dtsi +++ b/kera-audio-qrd.dtsi @@ -29,7 +29,7 @@ }; }; -&wsa_swr { +&swr0 { wsa884x_0220: wsa884x@02170220 { status = "disabled"; }; diff --git a/kera-audio.dtsi b/kera-audio.dtsi index 16d1110e..59d02973 100644 --- a/kera-audio.dtsi +++ b/kera-audio.dtsi @@ -135,7 +135,7 @@ }; va_macro: va-macro@7660000 { - tx_swr: va_swr_master { + swr2: va_swr_master { }; }; @@ -143,12 +143,12 @@ }; rx_macro: rx-macro@6AC0000 { - rx_swr: rx_swr_master { + swr1: rx_swr_master { }; }; wsa_macro: wsa-macro@6B00000 { - wsa_swr: wsa_swr_master { + swr0: wsa_swr_master { }; }; @@ -175,9 +175,9 @@ }; &aliases { - wsa_swr = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; - rx_swr = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; - tx_swr = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; + swr0 = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master"; + swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master"; + swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@7660000/va_swr_master"; swr4 = "/soc/spf_core_platform/lpass_bt_swr@6CA0000/bt_swr_mstr"; }; From 6338ab11b7db5a6cff04879271b3ef734a80b4b8 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Wed, 27 Nov 2024 19:26:17 +0530 Subject: [PATCH 15/18] ARM: dts: msm: Change GIC and gpio Update GIC as per IPCAT the GIC number is incorrect. 722 will not get interrupts of HSJ and audio will be mute. Changing this to 721 as in tuna same issue was observing. correction of wrong gpio pin. Change-Id: Idb87af4d1438186ed29fc3227d447f1b6d189676 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-overlay.dtsi | 2 +- kera-lpi.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index 8a88bbbc..ea7d0954 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -48,7 +48,7 @@ qcom,swr_master_id = <3>; qcom,mipi-sdw-block-packing-mode = <1>; interrupts = - , + , ; interrupt-names = "swr_master_irq", "swr_wake_irq"; qcom,swr-wakeup-required = <1>; diff --git a/kera-lpi.dtsi b/kera-lpi.dtsi index ebf2e7b9..70127681 100644 --- a/kera-lpi.dtsi +++ b/kera-lpi.dtsi @@ -1804,7 +1804,7 @@ }; config { - pins = "gpio4"; + pins = "gpio14"; drive-strength = <2>; input-enable; bias-pull-down; From e8f6a16fb7824331dbc4d3136e14c201a00f2ad4 Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Thu, 28 Nov 2024 11:30:18 +0530 Subject: [PATCH 16/18] ARM: dts: msm: disable haptics in QRD Haptics to be disabled. Change-Id: I5a2cc26c2732cac803cd38da7b0c21d0e6e8b7e1 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-qrd.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/kera-audio-qrd.dtsi b/kera-audio-qrd.dtsi index 0afe6dc6..a19f90b0 100644 --- a/kera-audio-qrd.dtsi +++ b/kera-audio-qrd.dtsi @@ -77,6 +77,7 @@ &kera_snd { qcom,model = "kera-qrd-snd-card"; + swr-haptics-unsupported; asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd9378_codec>, <&wsa884x_0221>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", From 8ebc7e052262b1ae3405b8061974b43266b924be Mon Sep 17 00:00:00 2001 From: Ravulapati Vishnu Vardhan Rao Date: Fri, 29 Nov 2024 17:26:43 +0530 Subject: [PATCH 17/18] ARM: dts: msm: Update wcd codec for kera-qmp1000 Update correct wcd codec for kera qmp and its mic bias. Change-Id: I5c584401ff747f5ad801b93c0124eb00d1bc6965 Signed-off-by: Ravulapati Vishnu Vardhan Rao --- kera-audio-mtp-qmp1000.dtsi | 41 +++++-------------------------------- 1 file changed, 5 insertions(+), 36 deletions(-) diff --git a/kera-audio-mtp-qmp1000.dtsi b/kera-audio-mtp-qmp1000.dtsi index 902b1f00..8f57194a 100644 --- a/kera-audio-mtp-qmp1000.dtsi +++ b/kera-audio-mtp-qmp1000.dtsi @@ -5,33 +5,6 @@ #include "kera-audio-mtp.dtsi" -&swr1 { - qcom,swr-num-dev = <2>; -}; - -&wcd9378_rx_slave { - status = "okay"; -}; - -&wcd9378_tx_slave { - status = "okay"; -}; - -&wcd9378_codec { - status = "okay"; -}; - -&wcd939x_rx_slave { - status = "disabled"; -}; - -&wcd939x_tx_slave { - status = "disabled"; -}; - -&wcd939x_codec { - status = "disabled"; -}; &swr2 { qmp01: qmp@04170232 { @@ -114,12 +87,12 @@ &kera_snd { qcom,model = "kera-mtp-qmp-snd-card"; asoc-codec = <&stub_codec>, <&lpass_cdc>, - <&wcd9378_codec>, + <&wcd939x_codec>, <&wsa884x_0220>, <&wsa884x_0221>, <&qmp01>, <&qmp02>, <&qmp03>, <&qmp04>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd9378_codec", + "wcd939x_codec", "wsa-codec1", "wsa-codec2", "qmp-dmic.01", "qmp-dmic.02", "qmp-dmic.03", "qmp-dmic.04"; @@ -132,9 +105,7 @@ "AMIC3", "Analog Mic3", "AMIC3", "MIC BIAS3", "AMIC4", "Analog Mic4", - "AMIC4", "MIC BIAS3", - "AMIC5", "Analog Mic5", - "AMIC5", "MIC BIAS4", + "AMIC4", "MIC BIAS1", "VA AMIC1", "Analog Mic1", "VA AMIC1", "VA MIC BIAS1", "VA AMIC2", "Analog Mic2", @@ -142,9 +113,7 @@ "VA AMIC3", "Analog Mic3", "VA AMIC3", "VA MIC BIAS3", "VA AMIC4", "Analog Mic4", - "VA AMIC4", "VA MIC BIAS3", - "VA AMIC5", "Analog Mic5", - "VA AMIC5", "VA MIC BIAS4", + "VA AMIC4", "VA MIC BIAS1", "TX DMIC0", "Digital Mic0", "TX DMIC0", "MIC BIAS3", "TX DMIC1", "Digital Mic1", @@ -155,7 +124,7 @@ "TX DMIC3", "MIC BIAS1", "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", - "IN3_EAR", "AUX_OUT", + "IN3_AUX", "AUX_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", From 8a5e4541144e8688591a2d6d185c6aec147d6921 Mon Sep 17 00:00:00 2001 From: Yuhui Zhao Date: Wed, 4 Dec 2024 15:01:56 +0800 Subject: [PATCH 18/18] ARM: dts: msm: correct wsa channel of kera qrd Correct wsa channel of kera qrd. it should be left channel. Change-Id: I8b784e77b2db45963d0e27a47a51fc145febb52b Signed-off-by: Yuhui Zhao --- kera-audio-cdp.dtsi | 12 +++++------- kera-audio-mtp.dtsi | 4 ++-- kera-audio-overlay.dtsi | 2 +- kera-audio-qrd.dtsi | 8 ++++---- 4 files changed, 12 insertions(+), 14 deletions(-) diff --git a/kera-audio-cdp.dtsi b/kera-audio-cdp.dtsi index 3bba2f68..cfbe8973 100644 --- a/kera-audio-cdp.dtsi +++ b/kera-audio-cdp.dtsi @@ -98,7 +98,7 @@ "TX DMIC3", "MIC BIAS1", "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", - "IN3_EAR", "AUX_OUT", + "IN3_AUX", "AUX_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", @@ -108,9 +108,7 @@ "RX_TX DEC3_INP", "TX DEC3 MUX", "SpkrLeft IN", "WSA_SPK1 OUT", "SpkrRight IN", "WSA_SPK2 OUT", - "TX SWR_INPUT", "WCD_TX_OUTPUT", "VA SWR_INPUT", "VA_SWR_CLK", - "VA SWR_INPUT", "WCD_TX_OUTPUT", "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", "VA_AIF3 CAP", "VA_SWR_CLK", @@ -118,10 +116,10 @@ "VA DMIC1", "Digital Mic1", "VA DMIC2", "Digital Mic2", "VA DMIC3", "Digital Mic3", - "VA DMIC0", "VA MIC BIAS1", - "VA DMIC1", "VA MIC BIAS1", - "VA DMIC2", "VA MIC BIAS3", - "VA DMIC3", "VA MIC BIAS3"; + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1"; asoc-codec = <&stub_codec>, <&lpass_cdc>, <&wcd9378_codec>, <&wsa884x_0220>, <&wsa884x_0221>; diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi index 067fe728..16da7bbb 100644 --- a/kera-audio-mtp.dtsi +++ b/kera-audio-mtp.dtsi @@ -118,7 +118,7 @@ "TX DMIC3", "MIC BIAS1", "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", - "IN3_AUX", "AUX_OUT", + "IN3_EAR", "AUX_OUT", "WSA SRC0_INP", "SRC0", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", @@ -129,8 +129,8 @@ "SpkrLeft IN", "WSA_SPK1 OUT", "SpkrRight IN", "WSA_SPK2 OUT", "TX SWR_INPUT", "WCD_TX_OUTPUT", - "VA SWR_INPUT", "VA_SWR_CLK", "VA SWR_INPUT", "WCD_TX_OUTPUT", + "VA SWR_INPUT", "VA_SWR_CLK", "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", "VA_AIF3 CAP", "VA_SWR_CLK", diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi index ea7d0954..0c8b8f90 100644 --- a/kera-audio-overlay.dtsi +++ b/kera-audio-overlay.dtsi @@ -458,7 +458,7 @@ "RX_TX DEC1_INP", "TX DEC1 MUX", "RX_TX DEC2_INP", "TX DEC2 MUX", "RX_TX DEC3_INP", "TX DEC3 MUX", - "SpkrRight IN", "WSA_SPK2 OUT", + "SpkrLeft IN", "WSA_SPK1 OUT", "VA SWR_INPUT", "VA_SWR_CLK", "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", diff --git a/kera-audio-qrd.dtsi b/kera-audio-qrd.dtsi index a19f90b0..c5b51dd4 100644 --- a/kera-audio-qrd.dtsi +++ b/kera-audio-qrd.dtsi @@ -31,11 +31,11 @@ &swr0 { wsa884x_0220: wsa884x@02170220 { - status = "disabled"; + status = "okay"; }; wsa884x_0221: wsa884x@02170221 { - status = "okay"; + status = "disabled"; }; }; @@ -79,8 +79,8 @@ qcom,model = "kera-qrd-snd-card"; swr-haptics-unsupported; asoc-codec = <&stub_codec>, <&lpass_cdc>, - <&wcd9378_codec>, <&wsa884x_0221>; + <&wcd9378_codec>, <&wsa884x_0220>; asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", - "wcd9378_codec", "wsa-codec2"; + "wcd9378_codec", "wsa-codec1"; qcom,wsa-max-devs = <1>; };