From 39118055b92a677e1e82e2d98b859fb86c927d4e Mon Sep 17 00:00:00 2001
From: Taniya Das <quic_tdas@quicinc.com>
Date: Tue, 15 Apr 2025 16:46:59 +0530
Subject: [PATCH] FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Camera
 clock controller

Add DT bindings for the Camera clock on QCS615 platforms. Add the
relevant DT include definitions as well.

Change-Id: Iccb0ed8449b3efc4f378311513e757a11c72ae06
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/linux-arm-msm/20250119-qcs615-mm-v4-clockcontroller-v4-2-5d1bdb5a140c@quicinc.com/
Patch-mainline: linux-arm-kernel @ 19/01/25, 15:52
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Dongfang Zhao <quic_doz@quicinc.com>
---
 bindings/clock/qcom,qcs615-camcc.yaml | 55 +++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)
 create mode 100644 bindings/clock/qcom,qcs615-camcc.yaml

diff --git a/bindings/clock/qcom,qcs615-camcc.yaml b/bindings/clock/qcom,qcs615-camcc.yaml
new file mode 100644
index 00000000..82c4dee5
--- /dev/null
+++ b/bindings/clock/qcom,qcs615-camcc.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,qcs615-camcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Camera Clock & Reset Controller on QCS615
+
+maintainers:
+  - Taniya Das <quic_tdas@quicinc.com>
+
+description: |
+  Qualcomm camera clock control module provides the clocks, resets and power
+  domains on QCS615
+
+  See also: include/dt-bindings/clock/qcom,qcs615-camcc.h
+
+properties:
+  compatible:
+    const: qcom,qcs615-camcc
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: Board XO source
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - '#clock-cells'
+  - '#reset-cells'
+  - '#power-domain-cells'
+
+allOf:
+  - $ref: qcom,gcc.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,rpmh.h>
+    clock-controller@ad00000 {
+      compatible = "qcom,qcs615-camcc";
+      reg = <0xad00000 0x10000>;
+      clocks = <&rpmhcc RPMH_CXO_CLK>;
+
+      #clock-cells = <1>;
+      #reset-cells = <1>;
+      #power-domain-cells = <1>;
+    };
+...
+