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ARM: dts: msm: Add UFS nodes for kera pre-sil

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Add UFS host controller and PHY nodes for kera soc.

Change-Id: I11a8dde3e083c35b4744a6bed5e8032f69fbf4fb
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
This commit is contained in:
Manish Pandey
2024-10-24 22:08:59 +05:30
parent 3248cbbb0c
commit 3845e9a00a
2 changed files with 167 additions and 0 deletions
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80
qcom/kera-rumi.dtsi
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@@ -3,6 +3,9 @@
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/clock/qcom,gcc-kera.h>
#include <dt-bindings/clock/qcom,rpmh.h>
&arch_timer {
clock-frequency = <500000>;
};
@@ -35,6 +38,83 @@
};
};
&ufsphy_mem {
compatible = "qcom,ufs-phy-qrbtc-sdm845";
/* VDDA_UFS_CORE */
vdda-phy-supply = <&L6B>;
vdda-phy-max-microamp = <211860>;
/*
* Platforms supporting Gear 5 && Rate B require a different
* voltage supply. Check the Power Grid document.
*/
vdda-phy-min-microvolt = <912000>;
/* VDDA_UFS_0_1P2 */
vdda-pll-supply = <&L4B>;
vdda-pll-max-microamp = <18330>;
/* Phy GDSC for VDD_MX, always on */
vdd-phy-gdsc-supply = <&gcc_ufs_mem_phy_gdsc>;
/* Qref power supply, Refer Qref diagram */
vdda-qref-supply = <&L2B>;
vdda-qref-max-microamp = <1890>;
/* Detect whether RH132 card based sequences to be used */
qcom,soc_emulation_type_addr = <0x1fc8004>;
qcom,soc_emulation_type_bits = <32>;
status = "ok";
};
&ufshc_mem {
limit-tx-hs-gear = <1>;
limit-rx-hs-gear = <1>;
limit-rate = <2>; /* HS Rate-B */
rpm-level = <0>;
spm-level = <0>;
vdd-hba-supply = <&gcc_ufs_phy_gdsc>;
vcc-supply = <&L12B>;
vcc-max-microamp = <800000>;
vccq-supply = <&L1D>;
vccq-max-microamp = <750000>;
qcom,vddp-ref-clk-supply = <&L3G>;
qcom,vddp-ref-clk-max-microamp = <100>;
qcom,vccq-parent-supply = <&S2B>;
qcom,vccq-parent-max-microamp = <210000>;
clock-names =
"core_clk",
"bus_aggr_clk",
"iface_clk",
"core_clk_unipro",
"core_clk_ice",
"ref_clk",
"tx_lane0_sync_clk",
"rx_lane0_sync_clk",
"rx_lane1_sync_clk";
clocks =
<&gcc GCC_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>,
<&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
<&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&rpmhcc RPMH_CXO_PAD_CLK>,
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
qcom,disable-lpm;
status = "ok";
};
&usb0 {
dwc3@a600000 {
usb-phy = <&usb_emuphy>, <&usb_nop_phy>;