ARM: dts: msm: Add support to set FUNC_SEL & wake set for GPIO

Add support to set function to "wcn_sw_ctrl" & set
mpm_wake_set for SW_CTRL GPIO so that, when this
GPIO goes high, PDC get interrupted and TCS sequence
(which enables RF_CLK) can be started.

Change-Id: Ifdff31f6ad6286a32c3a6f8b500cb6b55b97eb42
CRs-Fixed: 4020424

bindings/icnss-wlan.yaml

@@ -86,6 +86,9 @@ properties:
    qcom,smp2p_map_wlan_1_in:
      description: Represents the in smp2p to wlan driver from modem.
 
+   pin-ctrl-support:
+     description: Represents pin_ctrl support is present or not.
+
 required:
   - compatible
   - reg

kera-qca6750.dtsi

@@ -6,6 +6,15 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
+&tlmm {
+	icnss_sw_ctrl: icnss_sw_ctrl {
+		mux {
+			pins = "gpio81";
+			function = "wcn_sw_ctrl";
+		};
+	};
+};
+
 &soc {
 	qcom,smp2p-wpss {
 		smp2p_wlan_1_in: qcom,smp2p-wlan-1-in {
@@ -46,7 +55,12 @@
 		wlan-en-gpio = <35>;
 		host-sol-gpio = <33>;
 		dev-sol-gpio = <32>;
-		wlan-sw-ctrl-gpio = <81>;
+		sw-ctrl-gpio = <81>;
+		/* List of GPIOs to be setup for interrupt wakeup capable */
+		mpm_wake_set_gpios = <81>;
+		pinctrl-names = "sw_ctrl";
+		pinctrl-0 = <&icnss_sw_ctrl>;
+
 		interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
 			     <GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
 			     <GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
@@ -85,6 +99,7 @@
 		qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>;
 		qcom,iommu-geometry = <0xb0000000 0x10010000>;
 		dma-coherent;
+		pin-ctrl-support;
 		qcom,fw-prefix;
 		qcom,wlan;
 		tsens = "sys-therm-3";

kera-wcn7750.dtsi

@@ -7,6 +7,15 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interconnect/qcom,kera.h>
 
+&tlmm {
+	icnss_sw_ctrl: icnss_sw_ctrl {
+		mux {
+			pins = "gpio81";
+			function = "wcn_sw_ctrl";
+		};
+	};
+};
+
 &soc {
 	qcom,smp2p-wpss {
 		smp2p_wlan_1_in: qcom,smp2p-wlan-1-in {
@@ -58,7 +67,12 @@
 		wlan-en-gpio = <35>;
 		host-sol-gpio = <33>;
 		dev-sol-gpio = <32>;
-		wlan-sw-ctrl-gpio = <81>;
+		sw-ctrl-gpio = <81>;
+		/* List of GPIOs to be setup for interrupt wakeup capable */
+		mpm_wake_set_gpios = <81>;
+		pinctrl-names = "sw_ctrl";
+		pinctrl-0 = <&icnss_sw_ctrl>;
+
 		interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
 			     <GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
 			     <GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
@@ -94,6 +108,7 @@
 
 		qcom,iommu-group = <&icnss2_direct_link_iommu_group0>;
 		dma-coherent;
+		pin-ctrl-support;
 		qcom,fw-prefix;
 		qcom,wlan;
 		tsens = "sys-therm-3";

tuna-wcn7750.dtsi

@@ -7,6 +7,15 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interconnect/qcom,tuna.h>
 
+&tlmm {
+	icnss_sw_ctrl: icnss_sw_ctrl {
+		mux {
+			pins = "gpio80";
+			function = "wcn_sw_ctrl";
+		};
+	};
+};
+
 &soc {
 	qcom,smp2p-wpss {
 		smp2p_wlan_1_in: qcom,smp2p-wlan-1-in {
@@ -54,7 +63,12 @@
 		wlan-en-gpio =<35>;
 		host-sol-gpio =<132>;
 		dev-sol-gpio =<32>;
-		wlan-sw-ctrl-gpio =<80>;
+		sw-ctrl-gpio =<80>;
+		/* List of GPIOs to be setup for interrupt wakeup capable */
+		mpm_wake_set_gpios = <80>;
+		pinctrl-names = "sw_ctrl";
+		pinctrl-0 = <&icnss_sw_ctrl>;
+
 		interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
 			     <GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
 			     <GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
@@ -90,6 +104,7 @@
 
 		qcom,iommu-group = <&icnss2_direct_link_iommu_group0>;
 		dma-coherent;
+		pin-ctrl-support;
 		qcom,fw-prefix;
 		qcom,wlan;
 		tsens = "sys-therm-3";