From 33d71dd74f77237fb309f24df6d01e7a777d5a87 Mon Sep 17 00:00:00 2001 From: Anaadi Mishra Date: Thu, 12 Dec 2024 15:57:48 +0530 Subject: [PATCH] ARM: dts: msm: Move the pcie_1 clocks to protected-clocks Mark the pcie_1 clocks as protected and remove the pcie_1 gdsc nodes. Change-Id: I3102a52895a6531fb82a411bdb760073fc3c28f3 Signed-off-by: Anaadi Mishra --- qcom/kera.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi index efcb4f6d..04329706 100644 --- a/qcom/kera.dtsi +++ b/qcom/kera.dtsi @@ -1839,6 +1839,12 @@ "ufs_phy_rx_symbol_1_clk", "ufs_phy_tx_symbol_0_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk"; + protected-clocks = <&gcc GCC_PCIE_1_AUX_CLK>, <&gcc GCC_PCIE_1_AUX_CLK_SRC>, + <&gcc GCC_PCIE_1_CFG_AHB_CLK>, <&gcc GCC_PCIE_1_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_1_PHY_RCHNG_CLK>, <&gcc GCC_PCIE_1_PHY_RCHNG_CLK_SRC>, + <&gcc GCC_PCIE_1_PIPE_CLK>, <&gcc GCC_PCIE_1_PIPE_CLK_SRC>, + <&gcc GCC_PCIE_1_PIPE_DIV2_CLK>, <&gcc GCC_PCIE_1_PIPE_DIV2_CLK_SRC>, + <&gcc GCC_PCIE_1_SLV_AXI_CLK>, <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>; #clock-cells = <1>; #reset-cells = <1>; }; @@ -3183,12 +3189,10 @@ &gcc_pcie_1_gdsc { parent-supply = <&VDD_CX_LEVEL>; - status = "ok"; }; &gcc_pcie_1_phy_gdsc { parent-supply = <&VDD_MX_LEVEL>; - status = "ok"; }; &gcc_ufs_mem_phy_gdsc {