ARM: dts: msm: Update Tuna GPU frequency plan
Update frequency plan as per the latest recommendation. Change-Id: I5c904b148f149f094dea735ba0a975862538dad6 Signed-off-by: SIVA MULLATI <quic_smullati@quicinc.com>
This commit is contained in:
SIVA MULLATI
committed by
Siva Mullati
Siva Mullati
parent
39e3b2a5bd
commit
31cd596f9b
@@ -3,6 +3,18 @@
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/* ACD Control register values */
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#define ACD_LEVEL_TURBO_L2 0xa02f5ffd
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#define ACD_LEVEL_TURBO_L1 0xa8285ffd
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#define ACD_LEVEL_TURBO 0x88295ffd
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#define ACD_LEVEL_NOM_L1 0xa8295ffd
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#define ACD_LEVEL_NOM 0x882a5ffd
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#define ACD_LEVEL_SVS_L2 0x882a5ffd
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#define ACD_LEVEL_SVS_L1 0xa82a5ffd
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#define ACD_LEVEL_SVS 0xa82c5ffd
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#define ACD_LEVEL_LOW_SVS 0xc02c5ffd
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#define ACD_LEVEL_LOW_SVS_D1 0xc02c5ffd
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&msm_gpu {
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/* Power levels */
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qcom,gpu-pwrlevel-bins {
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@@ -19,106 +31,137 @@
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,initial-pwrlevel = <8>;
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qcom,initial-pwrlevel = <9>;
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qcom,speed-bin = <0>;
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/* Turbo_L1 */
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/* Turbo_L2 */
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qcom,gpu-pwrlevel@0 {
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reg = <0>;
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qcom,gpu-freq = <1150000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L2>;
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qcom,bus-freq = <11>;
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qcom,bus-min = <11>;
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qcom,bus-max = <11>;
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qcom,acd-level = <ACD_LEVEL_TURBO_L2>;
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};
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/* Turbo_L1 */
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-freq = <1050000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
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qcom,bus-freq = <11>;
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qcom,bus-min = <11>;
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qcom,bus-max = <11>;
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qcom,acd-level = <ACD_LEVEL_TURBO_L1>;
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};
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/* Turbo */
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-freq = <937000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
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qcom,bus-freq = <10>;
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qcom,bus-min = <9>;
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qcom,bus-max = <10>;
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qcom,acd-level = <ACD_LEVEL_TURBO>;
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};
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/* Nom_L1 */
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-freq = <873000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
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qcom,bus-freq = <9>;
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qcom,bus-min = <7>;
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qcom,bus-max = <9>;
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qcom,acd-level = <ACD_LEVEL_NOM_L1>;
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};
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/* Nom */
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-pwrlevel@4 {
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reg = <4>;
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qcom,gpu-freq = <763000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
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qcom,bus-freq = <8>;
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qcom,bus-min = <7>;
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qcom,bus-max = <9>;
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qcom,acd-level = <ACD_LEVEL_NOM>;
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};
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/* SVS_L2 */
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qcom,gpu-pwrlevel@4 {
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reg = <4>;
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qcom,gpu-pwrlevel@5 {
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reg = <5>;
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qcom,gpu-freq = <688000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <4>;
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qcom,bus-max = <7>;
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qcom,acd-level = <ACD_LEVEL_SVS_L2>;
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};
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/* SVS_L1 */
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qcom,gpu-pwrlevel@5 {
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reg = <5>;
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qcom,gpu-pwrlevel@6 {
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reg = <6>;
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qcom,gpu-freq = <644000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <4>;
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qcom,bus-max = <7>;
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qcom,acd-level = <ACD_LEVEL_SVS_L1>;
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};
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/* SVS */
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qcom,gpu-pwrlevel@6 {
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reg = <6>;
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qcom,gpu-pwrlevel@7 {
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reg = <7>;
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qcom,gpu-freq = <510000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
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qcom,bus-freq = <4>;
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qcom,bus-min = <2>;
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qcom,bus-max = <6>;
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qcom,acd-level = <ACD_LEVEL_SVS>;
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};
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/* Low_SVS */
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qcom,gpu-pwrlevel@7 {
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reg = <7>;
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qcom,gpu-pwrlevel@8 {
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reg = <8>;
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qcom,gpu-freq = <362000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
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qcom,bus-freq = <3>;
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qcom,bus-min = <1>;
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qcom,bus-max = <3>;
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qcom,acd-level = <ACD_LEVEL_LOW_SVS>;
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};
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/* Low_SVS_D1 */
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qcom,gpu-pwrlevel@8 {
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reg = <8>;
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qcom,gpu-pwrlevel@9 {
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reg = <9>;
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qcom,gpu-freq = <264000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
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qcom,bus-freq = <1>;
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qcom,bus-min = <1>;
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qcom,bus-max = <3>;
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qcom,acd-level = <ACD_LEVEL_LOW_SVS_D1>;
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};
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};
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@@ -138,6 +181,8 @@
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qcom,bus-freq = <11>;
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qcom,bus-min = <11>;
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qcom,bus-max = <11>;
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qcom,acd-level = <ACD_LEVEL_TURBO_L1>;
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};
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/* Turbo */
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@@ -149,6 +194,8 @@
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qcom,bus-freq = <10>;
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qcom,bus-min = <9>;
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qcom,bus-max = <10>;
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qcom,acd-level = <ACD_LEVEL_TURBO>;
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};
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/* Nom_L1 */
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@@ -160,6 +207,7 @@
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qcom,bus-freq = <9>;
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qcom,bus-min = <7>;
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qcom,bus-max = <9>;
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qcom,acd-level = <ACD_LEVEL_NOM_L1>;
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};
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/* Nom */
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@@ -171,6 +219,8 @@
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qcom,bus-freq = <8>;
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qcom,bus-min = <7>;
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qcom,bus-max = <9>;
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qcom,acd-level = <ACD_LEVEL_NOM>;
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};
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/* SVS_L2 */
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@@ -182,6 +232,8 @@
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qcom,bus-freq = <6>;
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qcom,bus-min = <4>;
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qcom,bus-max = <7>;
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qcom,acd-level = <ACD_LEVEL_SVS_L2>;
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};
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/* SVS_L1 */
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@@ -193,6 +245,8 @@
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qcom,bus-freq = <6>;
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qcom,bus-min = <4>;
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qcom,bus-max = <7>;
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qcom,acd-level = <ACD_LEVEL_SVS_L1>;
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};
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/* SVS */
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@@ -204,6 +258,8 @@
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qcom,bus-freq = <4>;
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qcom,bus-min = <2>;
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qcom,bus-max = <6>;
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qcom,acd-level = <ACD_LEVEL_SVS>;
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};
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/* Low_SVS */
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@@ -215,6 +271,8 @@
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qcom,bus-freq = <3>;
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qcom,bus-min = <1>;
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qcom,bus-max = <3>;
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qcom,acd-level = <ACD_LEVEL_LOW_SVS>;
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};
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/* Low_SVS_D1 */
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@@ -226,6 +284,8 @@
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qcom,bus-freq = <1>;
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qcom,bus-min = <1>;
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qcom,bus-max = <3>;
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qcom,acd-level = <ACD_LEVEL_LOW_SVS_D1>;
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};
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};
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@@ -233,106 +293,137 @@
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,initial-pwrlevel = <8>;
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qcom,initial-pwrlevel = <9>;
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qcom,speed-bin = <0xf2>;
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/* Turbo_L1 */
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/* Turbo_L2 */
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qcom,gpu-pwrlevel@0 {
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reg = <0>;
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qcom,gpu-freq = <1150000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L2>;
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qcom,bus-freq = <11>;
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qcom,bus-min = <11>;
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qcom,bus-max = <11>;
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qcom,acd-level = <ACD_LEVEL_TURBO_L2>;
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};
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/* Turbo_L1 */
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-freq = <1050000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
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qcom,bus-freq = <11>;
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qcom,bus-min = <11>;
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qcom,bus-max = <11>;
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qcom,acd-level = <ACD_LEVEL_TURBO_L1>;
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};
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/* Turbo */
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-freq = <937000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
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qcom,bus-freq = <10>;
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qcom,bus-min = <9>;
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qcom,bus-max = <10>;
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qcom,acd-level = <ACD_LEVEL_TURBO>;
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};
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/* Nom_L1 */
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-freq = <873000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
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qcom,bus-freq = <9>;
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qcom,bus-min = <7>;
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qcom,bus-max = <9>;
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qcom,acd-level = <ACD_LEVEL_NOM_L1>;
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};
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/* Nom */
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-pwrlevel@4 {
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reg = <4>;
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qcom,gpu-freq = <763000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
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qcom,bus-freq = <8>;
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qcom,bus-min = <7>;
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qcom,bus-max = <9>;
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qcom,acd-level = <ACD_LEVEL_NOM>;
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};
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/* SVS_L2 */
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qcom,gpu-pwrlevel@4 {
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reg = <4>;
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qcom,gpu-pwrlevel@5 {
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reg = <5>;
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qcom,gpu-freq = <688000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <4>;
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qcom,bus-max = <7>;
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qcom,acd-level = <ACD_LEVEL_SVS_L2>;
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};
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/* SVS_L1 */
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qcom,gpu-pwrlevel@5 {
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reg = <5>;
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qcom,gpu-pwrlevel@6 {
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reg = <6>;
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qcom,gpu-freq = <644000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <4>;
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qcom,bus-max = <7>;
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qcom,acd-level = <ACD_LEVEL_SVS_L1>;
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};
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/* SVS */
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qcom,gpu-pwrlevel@6 {
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reg = <6>;
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qcom,gpu-pwrlevel@7 {
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reg = <7>;
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qcom,gpu-freq = <510000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
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qcom,bus-freq = <4>;
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qcom,bus-min = <2>;
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qcom,bus-max = <6>;
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qcom,acd-level = <ACD_LEVEL_SVS>;
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};
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/* Low_SVS */
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qcom,gpu-pwrlevel@7 {
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reg = <7>;
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qcom,gpu-pwrlevel@8 {
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reg = <8>;
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qcom,gpu-freq = <362000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
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qcom,bus-freq = <3>;
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qcom,bus-min = <1>;
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qcom,bus-max = <3>;
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qcom,acd-level = <ACD_LEVEL_LOW_SVS>;
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};
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/* Low_SVS_D1 */
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qcom,gpu-pwrlevel@8 {
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reg = <8>;
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qcom,gpu-pwrlevel@9 {
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reg = <9>;
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qcom,gpu-freq = <264000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
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qcom,bus-freq = <1>;
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qcom,bus-min = <1>;
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qcom,bus-max = <3>;
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qcom,acd-level = <ACD_LEVEL_LOW_SVS_D1>;
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};
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};
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};
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Reference in New Issue
Block a user