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ARM: dts: msm: clock rate change for Bonito

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Max Low SVS_D1 and Max Low SVS clock rates got changed
for Bonito w.r.t Pakala.

Change-Id: I440153b6e6dbfc797759c4d9c7152fa1fc7b9d15
Signed-off-by: Gopireddy Arunteja Reddy <quic_garuntej@quicinc.com>
This commit is contained in:
Gopireddy Arunteja Reddy
2024-10-18 13:20:25 +05:30
committed by Arunteja Reddy Gopireddy
parent ff47fdaf56
commit 315bdd85e5
1 changed files with 1 additions and 1 deletions
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2
tuna-eva.dtsi
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@@ -33,7 +33,7 @@
"core_clk", "eva_cc_mvs0_clk_src";
qcom,clock-configs = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1>;
qcom,allowed-clock-rates = <350000000 400000000 450000000 500000000 550000000>;
qcom,allowed-clock-rates = <280000000 350000000 450000000 500000000 550000000>;
/*To be added - GCC_EVA CLK_ARES and GCC_EVA_AXI0C_CLK_ARES*/
resets = <&evacc EVA_CC_MVS0C_CLK_ARES>;