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ARM: dts: msm: sun: Add node for gic interrupt router

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Add node for gic interrupt router for sun SoC.

Change-Id: Id5690f286f89f6f15051477cf06ad8a390c69c7a
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
This commit is contained in:
Melody Olvera
2023-10-03 12:18:48 -07:00
parent 96351f54d0
commit 2e5af8d110
1 changed files with 9 additions and 1 deletions
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10
qcom/sun.dtsi
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@@ -34,7 +34,7 @@
chosen: chosen {
bootargs = "nokaslr kpti=0 log_buf_len=256K swiotlb=0 loop.max_part=7 pcie_ports=compat mem-offline.bypass_send_msg=1 cpuidle.off=1";
bootargs = "nokaslr kpti=0 log_buf_len=256K swiotlb=0 loop.max_part=7 irqaffinity=0-1 pcie_ports=compat mem-offline.bypass_send_msg=1 cpuidle.off=1";
stdout-path = "/soc/qcom,qupv3_1_geni_se@ac0000/qcom,qup_uart@a9c000:115200n8";
};
@@ -809,6 +809,14 @@
cap-based-alloc-and-pwr-collapse;
};
gic-interrupt-router {
compatible = "qcom,gic-intr-routing";
/* keep a few m cores in class0 only to avoid wakeup of l cores */
qcom,gic-class0-cpus = <0 1>;
/* keep other cores in class1 */
qcom,gic-class1-cpus = <2 3 4 5 6 7>;
};
qcom,secure-buffer {
compatible = "qcom,secure-buffer";
qcom,vmid-cp-camera-preview-ro;