ARM: dts: msm: Update Tuna GPU
Enable cx_host_irq, genPD and update bus frequency for Tuna GPU. Change-Id: I192fccfe65191ea73d4be4cdca245d65830acc0e Signed-off-by: SIVA MULLATI <quic_smullati@quicinc.com>
This commit is contained in:
@@ -19,9 +19,9 @@
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qcom,gpu-freq = <1050000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
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qcom,bus-freq = <9>;
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qcom,bus-min = <9>;
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qcom,bus-max = <9>;
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qcom,bus-freq = <11>;
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qcom,bus-min = <11>;
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qcom,bus-max = <11>;
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};
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/* Turbo */
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@@ -30,9 +30,9 @@
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qcom,gpu-freq = <937000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
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qcom,bus-freq = <9>;
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qcom,bus-min = <8>;
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qcom,bus-max = <9>;
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qcom,bus-freq = <10>;
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qcom,bus-min = <9>;
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qcom,bus-max = <10>;
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};
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/* Nom_L1 */
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@@ -41,7 +41,7 @@
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qcom,gpu-freq = <873000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
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qcom,bus-freq = <8>;
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qcom,bus-freq = <9>;
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qcom,bus-min = <7>;
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qcom,bus-max = <9>;
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};
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@@ -52,9 +52,9 @@
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qcom,gpu-freq = <763000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
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qcom,bus-freq = <7>;
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qcom,bus-min = <6>;
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qcom,bus-max = <8>;
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qcom,bus-freq = <8>;
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qcom,bus-min = <7>;
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qcom,bus-max = <9>;
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};
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/* SVS_L2 */
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@@ -63,9 +63,9 @@
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qcom,gpu-freq = <688000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
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qcom,bus-freq = <7>;
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qcom,bus-min = <5>;
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qcom,bus-max = <8>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <4>;
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qcom,bus-max = <7>;
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};
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/* SVS_L1 */
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@@ -74,9 +74,9 @@
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qcom,gpu-freq = <644000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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qcom,bus-freq = <7>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <4>;
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qcom,bus-max = <8>;
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qcom,bus-max = <7>;
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};
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/* SVS */
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@@ -87,7 +87,7 @@
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qcom,bus-freq = <4>;
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qcom,bus-min = <2>;
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qcom,bus-max = <7>;
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qcom,bus-max = <6>;
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};
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/* Low_SVS */
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@@ -23,11 +23,15 @@
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reg-names = "kgsl_3d0_reg_memory", "rscc", "cx_dbgc", "cx_misc",
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"qdss_gfx", "qdss_etr", "qdss_tmc";
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interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "kgsl_3d0_irq";
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interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>, <0 80 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "kgsl_3d0_irq", "cx_host_irq";
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clocks = <&gcc GCC_GPU_GEMNOC_GFX_CLK>, <&gpucc GPU_CC_AHB_CLK>;
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clock-names = "gcc_gpu_memnoc_gfx", "gpu_cc_ahb";
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clocks = <&gcc GCC_GPU_GEMNOC_GFX_CLK>,
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<&gpucc GPU_CC_AHB_CLK>,
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<&aoss_qmp QDSS_CLK>;
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clock-names = "gcc_gpu_memnoc_gfx",
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"gpu_cc_ahb",
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"apb_pclk";
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qcom,gpu-model = "Adreno825";
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@@ -56,7 +60,7 @@
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<MHZ_TO_KBPS(3187, 4)>, /* NOM index=8 */
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<MHZ_TO_KBPS(3686, 4)>, /* TURBO index=9 */
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<MHZ_TO_KBPS(4224, 4)>, /* TURBO_L1 index=10 */
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<MHZ_TO_KBPS(4761, 4)>; /* TURBO_L3 index=11 */
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<MHZ_TO_KBPS(4761, 4)>; /* TURBO_L2 index=11 */
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zap-shader {
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memory-region = <&gpu_microcode_mem>;
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@@ -111,7 +115,7 @@
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compatible = "qcom,kgsl-smmu-v2";
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reg = <0x3da0000 0x40000>;
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vddcx-supply = <&gpu_cc_cx_gdsc>;
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power-domains = <&gpucc GPU_CC_CX_GDSC>;
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gfx3d_user: gfx3d_user {
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compatible = "qcom,smmu-kgsl-cb";
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@@ -144,10 +148,10 @@
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<0 305 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hfi", "gmu";
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regulator-names = "vddcx", "vdd";
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vddcx-supply = <&gpu_cc_cx_gdsc>;
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vdd-supply = <&gx_clkctl_gx_gdsc>;
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power-domains = <&gpucc GPU_CC_CX_GDSC>,
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<&gpucc GPU_CC_CX_GMU_GDSC>,
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<&gxclkctl GX_CLKCTL_GX_GDSC>;
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power-domain-names = "cx", "gmu_cx", "gx";
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clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
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<&gpucc GPU_CC_CXO_CLK>,
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