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ARM: dts: msm: Add interconnect vote for kgsl-smmu on sun

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When all clients remove DDR bandwidth vote, DDR may power collapse.
As part of its shutdown sequence, it waits for an 'active' signal to
no longer be asserted by the gpu cx gdsc. Thus, if SW votes for the
gdsc to be active, but not for DDR bandwidth, this sequence may
get stuck.

Change-Id: I48d704f08cfe6d17159eb04d02f5ed123809f967
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
This commit is contained in:
Patrick Daly
2024-08-14 14:48:22 -07:00
parent dba669a7e0
commit 29854f0195
1 changed files with 6 additions and 0 deletions
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6
qcom/msm-arm-smmu-sun.dtsi
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@@ -17,7 +17,13 @@
ranges; ranges;
dma-coherent; dma-coherent;
/*
* When gdsc is enabled, and cpu enters cpuidle, DDR
* bandwidth vote must be present to prevent DDR
* shutdown.
*/
power-domains = <&gpucc GPU_CC_CX_GDSC>; power-domains = <&gpucc GPU_CC_CX_GDSC>;
interconnects = <&gem_noc MASTER_GPU_TCU &mc_virt SLAVE_EBI1>;
clocks = <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; clocks = <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
clock-names = clock-names =