From 8794f7fa807a4fbcf0629704ffb8891e7999e91e Mon Sep 17 00:00:00 2001 From: Jayasri Sampath Kumaran Date: Fri, 23 Feb 2024 15:26:47 -0500 Subject: [PATCH 1/4] ARM: dts: msm: add support for MTP QMP1000 variants for sun target Add QMP1000 with v6 and v8 power grid for MTP platforms for sun target. Change-Id: If9a6c99f15add5fa7d86bb821587dc971bd87619 Signed-off-by: Jayasri Sampath Kumaran --- Kbuild | 4 +++- display/sun-sde-display-mtp-qmp1000-overlay.dts | 16 ++++++++++++++++ .../sun-sde-display-mtp-qmp1000-v8-overlay.dts | 16 ++++++++++++++++ 3 files changed, 35 insertions(+), 1 deletion(-) create mode 100644 display/sun-sde-display-mtp-qmp1000-overlay.dts create mode 100644 display/sun-sde-display-mtp-qmp1000-v8-overlay.dts diff --git a/Kbuild b/Kbuild index 56a64758..1d451b47 100644 --- a/Kbuild +++ b/Kbuild @@ -19,7 +19,9 @@ dtbo-$(CONFIG_ARCH_SUN) += display/sun-sde.dtbo \ display/sun-sde-display-mtp-3-5mm-overlay.dtbo \ display/sun-sde-display-rcm-kiwi-overlay.dtbo \ display/sun-sde-display-rcm-kiwi-v8-overlay.dtbo \ - display/sun-sde-display-rcm-v8-overlay.dtbo + display/sun-sde-display-rcm-v8-overlay.dtbo \ + display/sun-sde-display-mtp-qmp1000-overlay.dtbo \ + display/sun-sde-display-mtp-qmp1000-v8-overlay.dtbo else dtbo-$(CONFIG_ARCH_SUN) += display/trustedvm-sun-sde-display-cdp-overlay.dtbo \ display/trustedvm-sun-sde-display-mtp-overlay.dtbo \ diff --git a/display/sun-sde-display-mtp-qmp1000-overlay.dts b/display/sun-sde-display-mtp-qmp1000-overlay.dts new file mode 100644 index 00000000..00e92d1b --- /dev/null +++ b/display/sun-sde-display-mtp-qmp1000-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun MTP QMP1000"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x10108 0>; +}; diff --git a/display/sun-sde-display-mtp-qmp1000-v8-overlay.dts b/display/sun-sde-display-mtp-qmp1000-v8-overlay.dts new file mode 100644 index 00000000..ce16eb03 --- /dev/null +++ b/display/sun-sde-display-mtp-qmp1000-v8-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun MTP QMP1000 V8 Power Grid"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x40108 0>; +}; From 33a37fea084f57bf61c98724dcd206df65b1da69 Mon Sep 17 00:00:00 2001 From: Kirill Shpin Date: Tue, 27 Feb 2024 17:06:43 -0800 Subject: [PATCH 2/4] ARM: dts: msm: add license/copyright to panels Adds missing license and copyright information to all panel files, which don't currently have them. Change-Id: I73b6b6da76a28a4d3e9f86924c8d2732b41f90de Signed-off-by: Kirill Shpin --- display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi | 5 +++++ display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi | 5 +++++ display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi | 5 +++++ display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi | 5 +++++ display/dsi-panel-sharp-dsc-4k-cmd.dtsi | 5 +++++ display/dsi-panel-sharp-dsc-4k-video.dtsi | 5 +++++ display/dsi-panel-sim-cmd-au.dtsi | 5 +++++ display/dsi-panel-sim-cmd.dtsi | 5 +++++ display/dsi-panel-sim-dsc-10bit-cmd.dtsi | 5 +++++ display/dsi-panel-sim-dsc375-cmd.dtsi | 5 +++++ display/dsi-panel-sim-dualmipi-cmd.dtsi | 5 +++++ display/dsi-panel-sim-dualmipi-dsc375-cmd.dtsi | 5 +++++ display/dsi-panel-sim-dualmipi-video.dtsi | 5 +++++ display/dsi-panel-sim-sec-hd-cmd.dtsi | 5 +++++ display/dsi-panel-sim-video.dtsi | 5 +++++ display/dsi-panel-vtdr6130-dsc-fhd-plus-120hz-cmd.dtsi | 5 +++++ display/dsi-panel-vtdr6130-dsc-fhd-plus-120hz-video.dtsi | 5 +++++ display/dsi-panel-vtdr6130-dsc-fhd-plus-cmd.dtsi | 5 +++++ display/dsi-panel-vtdr6130-dsc-fhd-plus-video.dtsi | 5 +++++ display/dsi-panel-vtdr6130-qsync-dsc-fhd-plus-144hz-cmd.dtsi | 5 +++++ .../dsi-panel-vtdr6130-qsync-dsc-fhd-plus-144hz-video.dtsi | 5 +++++ 21 files changed, 105 insertions(+) diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi index 5612ec26..43b67ad0 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_nt37801_amoled_cmd_cphy: qcom,mdss_dsi_nt37801_wqhd_plus_cmd_cphy { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi index e417cdb2..a532daeb 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_nt37801_amoled_cmd: qcom,mdss_dsi_nt37801_wqhd_plus_cmd { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi index 53de247a..d9c48cd4 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_nt37801_amoled_video_cphy: qcom,mdss_dsi_nt37801_wqhd_plus_vid_cphy { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi b/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi index d4647340..8a36fe29 100644 --- a/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi +++ b/display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_nt37801_amoled_video: qcom,mdss_dsi_nt37801_wqhd_plus_vid { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-sharp-dsc-4k-cmd.dtsi b/display/dsi-panel-sharp-dsc-4k-cmd.dtsi index 4231b746..e303a6d5 100644 --- a/display/dsi-panel-sharp-dsc-4k-cmd.dtsi +++ b/display/dsi-panel-sharp-dsc-4k-cmd.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_sharp_4k_dsc_cmd: qcom,mdss_dsi_sharp_4k_dsc_cmd { qcom,mdss-dsi-panel-name = "Sharp 4k cmd mode dsc dsi panel"; diff --git a/display/dsi-panel-sharp-dsc-4k-video.dtsi b/display/dsi-panel-sharp-dsc-4k-video.dtsi index a687b5ff..efe59f9b 100644 --- a/display/dsi-panel-sharp-dsc-4k-video.dtsi +++ b/display/dsi-panel-sharp-dsc-4k-video.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_sharp_4k_dsc_video: qcom,mdss_dsi_sharp_4k_dsc_video { qcom,mdss-dsi-panel-name = "Sharp 4k video mode dsc dsi panel"; diff --git a/display/dsi-panel-sim-cmd-au.dtsi b/display/dsi-panel-sim-cmd-au.dtsi index 3815307f..fcb8df52 100644 --- a/display/dsi-panel-sim-cmd-au.dtsi +++ b/display/dsi-panel-sim-cmd-au.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_sim_panel_au: qcom,mdss_dsi_cmd_sim_panel_au { qcom,mdss-dsi-panel-name = "cmd mode dsi sim panel au"; diff --git a/display/dsi-panel-sim-cmd.dtsi b/display/dsi-panel-sim-cmd.dtsi index c10c3bce..813fe166 100644 --- a/display/dsi-panel-sim-cmd.dtsi +++ b/display/dsi-panel-sim-cmd.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_sim_cmd: qcom,mdss_dsi_sim_cmd { qcom,mdss-dsi-panel-name = "Simulator cmd mode dsi panel"; diff --git a/display/dsi-panel-sim-dsc-10bit-cmd.dtsi b/display/dsi-panel-sim-dsc-10bit-cmd.dtsi index 6c624c30..8e5cba14 100644 --- a/display/dsi-panel-sim-dsc-10bit-cmd.dtsi +++ b/display/dsi-panel-sim-dsc-10bit-cmd.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_sim_dsc_10b_cmd: qcom,mdss_dsi_sim_dsc_10b_cmd { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-sim-dsc375-cmd.dtsi b/display/dsi-panel-sim-dsc375-cmd.dtsi index 0211f659..bed6ed91 100644 --- a/display/dsi-panel-sim-dsc375-cmd.dtsi +++ b/display/dsi-panel-sim-dsc375-cmd.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_sim_dsc_375_cmd: qcom,mdss_dsi_sim_dsc_375_cmd { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-sim-dualmipi-cmd.dtsi b/display/dsi-panel-sim-dualmipi-cmd.dtsi index b16c48d5..275c0960 100644 --- a/display/dsi-panel-sim-dualmipi-cmd.dtsi +++ b/display/dsi-panel-sim-dualmipi-cmd.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_dual_sim_cmd: qcom,mdss_dsi_dual_sim_cmd { qcom,mdss-dsi-panel-name = "Sim dual cmd mode dsi panel"; diff --git a/display/dsi-panel-sim-dualmipi-dsc375-cmd.dtsi b/display/dsi-panel-sim-dualmipi-dsc375-cmd.dtsi index e59bfb05..28f2c96f 100644 --- a/display/dsi-panel-sim-dualmipi-dsc375-cmd.dtsi +++ b/display/dsi-panel-sim-dualmipi-dsc375-cmd.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_dual_sim_dsc_375_cmd: qcom,mdss_dsi_dual_sim_dsc_375_cmd { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-sim-dualmipi-video.dtsi b/display/dsi-panel-sim-dualmipi-video.dtsi index 537a0181..e977a78b 100644 --- a/display/dsi-panel-sim-dualmipi-video.dtsi +++ b/display/dsi-panel-sim-dualmipi-video.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_dual_sim_vid: qcom,mdss_dsi_dual_sim_video { qcom,mdss-dsi-panel-name = "Sim dual video mode dsi panel"; diff --git a/display/dsi-panel-sim-sec-hd-cmd.dtsi b/display/dsi-panel-sim-sec-hd-cmd.dtsi index dd948313..3172af60 100644 --- a/display/dsi-panel-sim-sec-hd-cmd.dtsi +++ b/display/dsi-panel-sim-sec-hd-cmd.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_sim_sec_hd_cmd: qcom,mdss_dsi_sim_sec_hd_cmd { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-sim-video.dtsi b/display/dsi-panel-sim-video.dtsi index 78d18c82..02fd6ca9 100644 --- a/display/dsi-panel-sim-video.dtsi +++ b/display/dsi-panel-sim-video.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_sim_vid: qcom,mdss_dsi_sim_video { qcom,mdss-dsi-panel-name = "Simulator video mode dsi panel"; diff --git a/display/dsi-panel-vtdr6130-dsc-fhd-plus-120hz-cmd.dtsi b/display/dsi-panel-vtdr6130-dsc-fhd-plus-120hz-cmd.dtsi index 4096eb88..30dfc315 100644 --- a/display/dsi-panel-vtdr6130-dsc-fhd-plus-120hz-cmd.dtsi +++ b/display/dsi-panel-vtdr6130-dsc-fhd-plus-120hz-cmd.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_vtdr6130_amoled_120hz_cmd: qcom,mdss_dsi_vtdr6130_fhd_plus_120hz_cmd { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-vtdr6130-dsc-fhd-plus-120hz-video.dtsi b/display/dsi-panel-vtdr6130-dsc-fhd-plus-120hz-video.dtsi index 6f0e924b..bd6bbec8 100644 --- a/display/dsi-panel-vtdr6130-dsc-fhd-plus-120hz-video.dtsi +++ b/display/dsi-panel-vtdr6130-dsc-fhd-plus-120hz-video.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_vtdr6130_amoled_120hz_video: qcom,mdss_dsi_vtdr6130_fhd_plus_120hz_vid { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-vtdr6130-dsc-fhd-plus-cmd.dtsi b/display/dsi-panel-vtdr6130-dsc-fhd-plus-cmd.dtsi index 4fcb45d3..45850567 100644 --- a/display/dsi-panel-vtdr6130-dsc-fhd-plus-cmd.dtsi +++ b/display/dsi-panel-vtdr6130-dsc-fhd-plus-cmd.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_vtdr6130_amoled_cmd: qcom,mdss_dsi_vtdr6130_fhd_plus_cmd { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-vtdr6130-dsc-fhd-plus-video.dtsi b/display/dsi-panel-vtdr6130-dsc-fhd-plus-video.dtsi index df28a81f..4c4886f9 100644 --- a/display/dsi-panel-vtdr6130-dsc-fhd-plus-video.dtsi +++ b/display/dsi-panel-vtdr6130-dsc-fhd-plus-video.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_vtdr6130_amoled_video: qcom,mdss_dsi_vtdr6130_fhd_plus_vid { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-vtdr6130-qsync-dsc-fhd-plus-144hz-cmd.dtsi b/display/dsi-panel-vtdr6130-qsync-dsc-fhd-plus-144hz-cmd.dtsi index c14db0a0..5143cf11 100644 --- a/display/dsi-panel-vtdr6130-qsync-dsc-fhd-plus-144hz-cmd.dtsi +++ b/display/dsi-panel-vtdr6130-qsync-dsc-fhd-plus-144hz-cmd.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_vtdr6130_amoled_qsync_144hz_cmd: qcom,mdss_dsi_vtdr6130_qsync_fhd_plus_144hz_cmd { qcom,mdss-dsi-panel-name = diff --git a/display/dsi-panel-vtdr6130-qsync-dsc-fhd-plus-144hz-video.dtsi b/display/dsi-panel-vtdr6130-qsync-dsc-fhd-plus-144hz-video.dtsi index 6948326c..baa8e311 100644 --- a/display/dsi-panel-vtdr6130-qsync-dsc-fhd-plus-144hz-video.dtsi +++ b/display/dsi-panel-vtdr6130-qsync-dsc-fhd-plus-144hz-video.dtsi @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + &mdss_mdp { dsi_vtdr6130_amoled_qsync_144hz_video: qcom,mdss_dsi_vtdr6130_qsync_fhd_plus_144hz_video { qcom,mdss-dsi-panel-name = From 39f6c30dc49c057ebedbeb0bbf18ce1e26b15c3b Mon Sep 17 00:00:00 2001 From: Jinfeng Gu Date: Fri, 1 Mar 2024 17:30:43 +0800 Subject: [PATCH 3/4] ARM: dts: msm: add NT37801 10 bits cmd mode panel support This change add NT37801 10 bits cmd mode panel support. Change-Id: I0e5472ea28b0e7e1725194d8b23e67b6c79509b5 Signed-off-by: Jinfeng Gu --- display/dsi-panel-nt37801-dsc-10bit-cmd.dtsi | 121 +++++++++++++++++++ display/sun-sde-display-cdp.dtsi | 11 ++ display/sun-sde-display-common.dtsi | 21 ++++ display/sun-sde-display-mtp.dtsi | 11 ++ 4 files changed, 164 insertions(+) create mode 100644 display/dsi-panel-nt37801-dsc-10bit-cmd.dtsi diff --git a/display/dsi-panel-nt37801-dsc-10bit-cmd.dtsi b/display/dsi-panel-nt37801-dsc-10bit-cmd.dtsi new file mode 100644 index 00000000..499ea14e --- /dev/null +++ b/display/dsi-panel-nt37801-dsc-10bit-cmd.dtsi @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&mdss_mdp { + dsi_nt37801_amoled_dsc_10b_cmd: qcom,mdss_dsi_nt37801_amoled_dsc_10b_cmd { + qcom,mdss-dsi-panel-name = + "nt37801 amoled cmd mode dsi csot panel with DSC 10bit"; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-physical-type = "oled"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <30>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-lane-map = "lane_map_0123"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,spr-pack-type = "pentile"; + qcom,mdss-dsi-display-timings { + timing@0 { + cell-index = <0>; + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <1440>; + qcom,mdss-dsi-panel-height = <3200>; + qcom,mdss-dsi-h-front-porch = <100>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <20>; + qcom,mdss-dsi-v-front-porch = <44>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-jitter = <0x4 0x1>; + + qcom,mdss-dsi-on-command = [ + 39 01 00 00 00 00 06 f0 55 aa 52 08 01 + 39 01 00 00 00 00 02 c3 19 + 39 01 00 00 00 00 02 6f 01 + 39 01 00 00 00 00 04 c5 0b 0b 0b + 39 01 00 00 00 00 05 ff aa 55 a5 81 + 39 01 00 00 00 00 02 6f 02 + 39 01 00 00 00 00 02 f5 10 + 39 01 00 00 00 00 02 6f 1b + 39 01 00 00 00 00 02 f4 55 + 39 01 00 00 00 00 02 6f 18 + 39 01 00 00 00 00 02 f8 19 + 39 01 00 00 00 00 02 6f 0f + 39 01 00 00 00 00 02 fc 00 + 39 01 00 00 00 00 05 2a 00 00 05 9f + 39 01 00 00 00 00 05 2b 00 00 0c 7f + 39 01 00 00 00 00 02 90 03 + 39 01 00 00 00 00 13 91 ab 28 00 28 f2 + 00 02 c2 03 e1 00 0a 03 14 01 e9 10 + f0 + 39 01 00 00 00 00 05 ff aa 55 a5 81 + 39 01 00 00 00 00 02 6f 23 + 39 01 00 00 00 00 15 fb 00 03 04 55 77 + 77 77 99 9b 10 00 1e 48 9a bb bc de + f0 11 30 + 39 01 00 00 00 00 02 f3 dc + 39 01 00 00 00 00 02 26 00 + 39 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 05 3b 00 14 00 2c + 39 01 00 00 00 00 02 53 20 + 39 01 00 00 00 00 07 51 07 ff 07 ff 0f + ff + 39 01 00 00 00 00 02 5a 01 + 39 01 00 00 00 00 02 5f 00 + 39 01 00 00 00 00 02 9c 01 + 05 01 00 00 00 00 01 2c + 39 01 00 00 00 00 02 2f 00 + 39 01 00 00 00 00 06 f0 55 aa 52 08 01 + 39 01 00 00 00 00 05 b2 55 01 ff 03 + 05 01 00 00 78 00 01 11 + 05 01 00 00 14 00 01 29 + ]; + + qcom,mdss-dsi-off-command = [ + 05 01 00 00 14 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-timing-switch-command-state = + "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + qcom,compression-mode = "dsc"; + qcom,mdss-dsc-slice-height = <40>; + qcom,mdss-dsc-slice-width = <720>; + qcom,mdss-dsc-slice-per-pkt = <1>; + qcom,mdss-dsc-bit-per-component = <10>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; + }; +}; diff --git a/display/sun-sde-display-cdp.dtsi b/display/sun-sde-display-cdp.dtsi index 548ccf02..98d492ee 100644 --- a/display/sun-sde-display-cdp.dtsi +++ b/display/sun-sde-display-cdp.dtsi @@ -67,6 +67,16 @@ qcom,platform-sec-reset-gpio = <&tlmm 97 0>; }; +&dsi_nt37801_amoled_dsc_10b_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + &dsi_nt37801_amoled_dsc_10b_video { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; @@ -198,6 +208,7 @@ panel = <&dsi_nt37801_amoled_cmd &dsi_nt37801_amoled_cmd_cphy &dsi_nt37801_amoled_video + &dsi_nt37801_amoled_dsc_10b_cmd &dsi_nt37801_amoled_dsc_10b_video &dsi_nt37801_amoled_video_cphy &dsi_nt37801_amoled_cmd_spr>; diff --git a/display/sun-sde-display-common.dtsi b/display/sun-sde-display-common.dtsi index 14929b06..d7cfcb99 100644 --- a/display/sun-sde-display-common.dtsi +++ b/display/sun-sde-display-common.dtsi @@ -7,6 +7,7 @@ #include "dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi" #include "dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi" #include "dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi" +#include "dsi-panel-nt37801-dsc-10bit-cmd.dtsi" #include "dsi-panel-nt37801-dsc-10bit-video.dtsi" #include "dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi" #include "dsi-panel-sharp-dsc-4k-cmd.dtsi" @@ -497,6 +498,26 @@ }; }; +&dsi_nt37801_amoled_dsc_10b_cmd { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1"; + qcom,esd-check-enabled; + qcom,mdss-dsi-panel-status-check-mode = "reg_read"; + qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; + qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-panel-status-value = <0x9c>; + qcom,mdss-dsi-panel-status-read-length = <1>; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 35 0d 0d 1f 1c 0d + 0e 0e 0c 02 04 2a 12]; + qcom,display-topology = <2 2 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_nt37801_amoled_dsc_10b_video { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; qcom,dsi-supported-dfps-list = <120 110 100 90 80>; diff --git a/display/sun-sde-display-mtp.dtsi b/display/sun-sde-display-mtp.dtsi index ea129f5c..a3792376 100644 --- a/display/sun-sde-display-mtp.dtsi +++ b/display/sun-sde-display-mtp.dtsi @@ -61,6 +61,16 @@ qcom,platform-reset-gpio = <&tlmm 98 0>; }; +&dsi_nt37801_amoled_dsc_10b_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + &dsi_nt37801_amoled_dsc_10b_video { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; @@ -189,6 +199,7 @@ &dsi_nt37801_amoled_cmd_cphy &dsi_nt37801_amoled_video &dsi_nt37801_amoled_video_cphy + &dsi_nt37801_amoled_dsc_10b_cmd &dsi_nt37801_amoled_dsc_10b_video &dsi_nt37801_amoled_cmd_spr>; }; From 344e1a69e9054ee9ca3d4d2b77d78e959640afea Mon Sep 17 00:00:00 2001 From: Jinfeng Gu Date: Wed, 6 Mar 2024 12:00:04 +0800 Subject: [PATCH 4/4] ARM: dts: msm: enable qsync for csot panel on sun target This change enable qsync for csot panel on sun target. Change-Id: I50068d98a263f28bc68a300b445125ce5ee73dff Signed-off-by: Jinfeng Gu --- ...-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi | 138 ++++++++++++++++++ ...panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi | 137 +++++++++++++++++ ...t37801-qsync-dsc-wqhd-plus-video-cphy.dtsi | 120 +++++++++++++++ ...nel-nt37801-qsync-dsc-wqhd-plus-video.dtsi | 119 +++++++++++++++ display/sun-sde-display-cdp.dtsi | 30 +++- display/sun-sde-display-common.dtsi | 82 +++++++++++ display/sun-sde-display-mtp.dtsi | 24 ++- display/sun-sde-display-qrd.dtsi | 24 ++- 8 files changed, 671 insertions(+), 3 deletions(-) create mode 100644 display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi create mode 100644 display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi create mode 100644 display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi create mode 100644 display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi diff --git a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi new file mode 100644 index 00000000..be7213c7 --- /dev/null +++ b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi @@ -0,0 +1,138 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&mdss_mdp { + dsi_nt37801_amoled_qsync_cmd_cphy: qcom,mdss_dsi_nt37801_qsync_wqhd_plus_cmd_cphy { + qcom,mdss-dsi-panel-name = + "nt37801 amoled qsync cmd mode dsi csot panel with DSC CPHY"; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-physical-type = "oled"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-lane-map = "lane_map_0123"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,panel-cphy-mode; + qcom,spr-pack-type = "pentile"; + qcom,qsync-enable; + qcom,mdss-dsi-qsync-min-refresh-rate = <60>; + qcom,mdss-dsi-display-timings { + timing@0 { + cell-index = <0>; + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <1440>; + qcom,mdss-dsi-panel-height = <3200>; + qcom,mdss-dsi-h-front-porch = <22>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <18>; + qcom,mdss-dsi-v-front-porch = <20>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-jitter = <0x4 0x1>; + + qcom,mdss-dsi-on-command = [ + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 02 6F 01 + 39 01 00 00 00 00 04 C5 0B 0B 0B + 39 01 00 00 00 00 05 FF AA 55 A5 80 + 39 01 00 00 00 00 02 6F 02 + 39 01 00 00 00 00 02 F5 10 + 39 01 00 00 00 00 02 6F 1B + 39 01 00 00 00 00 02 F4 55 + 39 01 00 00 00 00 02 6F 18 + 39 01 00 00 00 00 02 F8 19 + 39 01 00 00 00 00 02 6F 0F + 39 01 00 00 00 00 02 FC 00 + 39 01 00 00 00 00 05 2A 00 00 05 9F + 39 01 00 00 00 00 05 2B 00 00 0C 7F + 39 01 00 00 00 00 03 90 03 03 + 39 01 00 00 00 00 13 91 89 28 00 28 D2 + 00 02 86 04 3A 00 0A 02 AB 01 E9 10 + F0 + 39 01 00 00 00 00 02 6F 06 + 39 01 00 00 00 00 02 F3 DC + 39 01 00 00 00 00 02 26 00 + 39 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 05 3B 00 18 00 10 + 39 01 00 00 00 00 02 53 20 + 39 01 00 00 00 00 07 51 07 FF 07 FF 0F + FF + 39 01 00 00 00 00 02 5A 01 + 39 01 00 00 00 00 02 5F 00 + 39 01 00 00 00 00 02 9C 01 + 05 01 00 00 00 00 01 2C + 39 01 00 00 00 00 02 2F 00 + 39 01 00 00 00 00 05 FF AA 55 A5 82 + 39 01 00 00 00 00 02 6F 08 + 39 01 00 00 00 00 03 F3 CC 0C + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 05 B2 55 01 FF 03 + 05 01 00 00 78 00 01 11 + 05 01 00 00 14 00 01 29 + ]; + + qcom,mdss-dsi-off-command = [ + 05 01 00 00 14 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-qsync-on-commands = [ + 39 01 00 00 00 00 06 f0 55 aa 52 08 00 + 39 01 00 00 00 00 02 6f 1f + 39 01 00 00 00 00 02 c0 50 + 39 01 00 00 00 00 02 6f 22 + 39 01 00 00 00 00 03 c0 0C bf + 39 01 00 00 00 00 02 6f 13 + 39 01 00 00 00 00 03 c0 00 cc + 39 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 03 44 00 00 + 39 01 00 00 00 00 02 2f 10 + ]; + qcom,mdss-dsi-qsync-on-commands-state = + "dsi_hs_mode"; + qcom,mdss-dsi-qsync-off-commands = [ + 39 01 00 00 00 00 02 2f 00 + ]; + qcom,mdss-dsi-qsync-off-commands-state = + "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + qcom,compression-mode = "dsc"; + qcom,mdss-dsc-slice-height = <40>; + qcom,mdss-dsc-slice-width = <720>; + qcom,mdss-dsc-slice-per-pkt = <1>; + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; + }; +}; diff --git a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi new file mode 100644 index 00000000..acc300b4 --- /dev/null +++ b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&mdss_mdp { + dsi_nt37801_amoled_qsync_cmd: qcom,mdss_dsi_nt37801_qsync_wqhd_plus_cmd { + qcom,mdss-dsi-panel-name = + "nt37801 amoled qsync cmd mode dsi csot panel with DSC"; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-physical-type = "oled"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-sec-ctrl-num = <1>; + qcom,dsi-sec-phy-num = <1>; + + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-lane-map = "lane_map_0123"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,spr-pack-type = "pentile"; + qcom,qsync-enable; + qcom,mdss-dsi-qsync-min-refresh-rate = <60>; + qcom,mdss-dsi-display-timings { + timing@0 { + cell-index = <0>; + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <1440>; + qcom,mdss-dsi-panel-height = <3200>; + qcom,mdss-dsi-h-front-porch = <20>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-pulse-width = <4>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <18>; + qcom,mdss-dsi-v-front-porch = <20>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-jitter = <0x4 0x1>; + + qcom,mdss-dsi-on-command = [ + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 02 6F 01 + 39 01 00 00 00 00 04 C5 0B 0B 0B + 39 01 00 00 00 00 05 FF AA 55 A5 80 + 39 01 00 00 00 00 02 6F 02 + 39 01 00 00 00 00 02 F5 10 + 39 01 00 00 00 00 02 6F 1B + 39 01 00 00 00 00 02 F4 55 + 39 01 00 00 00 00 02 6F 18 + 39 01 00 00 00 00 02 F8 19 + 39 01 00 00 00 00 02 6F 0F + 39 01 00 00 00 00 02 FC 00 + 39 01 00 00 00 00 05 2A 00 00 05 9F + 39 01 00 00 00 00 05 2B 00 00 0C 7F + 39 01 00 00 00 00 03 90 03 03 + 39 01 00 00 00 00 13 91 89 28 00 28 D2 + 00 02 86 04 3A 00 0A 02 AB 01 E9 10 + F0 + 39 01 00 00 00 00 02 6F 06 + 39 01 00 00 00 00 02 F3 DC + 39 01 00 00 00 00 02 26 00 + 39 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 05 3B 00 18 00 10 + 39 01 00 00 00 00 02 53 20 + 39 01 00 00 00 00 07 51 07 FF 07 FF 0F + FF + 39 01 00 00 00 00 02 5A 01 + 39 01 00 00 00 00 02 5F 00 + 39 01 00 00 00 00 02 9C 01 + 05 01 00 00 00 00 01 2C + 39 01 00 00 00 00 02 2F 00 + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 05 B2 55 01 FF 03 + 05 01 00 00 78 00 01 11 + 05 01 00 00 14 00 01 29 + ]; + + qcom,mdss-dsi-off-command = [ + 05 01 00 00 14 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-qsync-on-commands = [ + 39 01 00 00 00 00 06 f0 55 aa 52 08 00 + 39 01 00 00 00 00 02 6f 1f + 39 01 00 00 00 00 02 c0 50 + 39 01 00 00 00 00 02 6f 22 + 39 01 00 00 00 00 03 c0 0C bf + 39 01 00 00 00 00 02 6f 13 + 39 01 00 00 00 00 03 c0 00 cc + 39 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 03 44 00 00 + 39 01 00 00 00 00 02 2f 10 + ]; + qcom,mdss-dsi-qsync-on-commands-state = + "dsi_hs_mode"; + qcom,mdss-dsi-qsync-off-commands = [ + 39 01 00 00 00 00 02 2f 00 + ]; + qcom,mdss-dsi-qsync-off-commands-state = + "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + qcom,compression-mode = "dsc"; + qcom,mdss-dsc-slice-height = <40>; + qcom,mdss-dsc-slice-width = <720>; + qcom,mdss-dsc-slice-per-pkt = <1>; + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; + }; +}; diff --git a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi new file mode 100644 index 00000000..7f33dd6f --- /dev/null +++ b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&mdss_mdp { + dsi_nt37801_amoled_qsync_video_cphy: qcom,mdss_dsi_nt37801_qsync_wqhd_plus_vid_cphy { + qcom,mdss-dsi-panel-name = + "nt37801 amoled qsync video mode dsi csot panel with DSC CPHY"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-physical-type = "oled"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-border-color = <0>; + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + qcom,mdss-dsi-tx-eot-append; + qcom,adjust-timer-wakeup-ms = <1>; + qcom,panel-cphy-mode; + qcom,spr-pack-type = "pentile"; + + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,qsync-enable; + qcom,mdss-dsi-qsync-min-refresh-rate = <80>; + qcom,mdss-dsi-display-timings { + timing@0 { + cell-index = <0>; + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <1440>; + qcom,mdss-dsi-panel-height = <3200>; + qcom,mdss-dsi-h-front-porch = <100>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <20>; + qcom,mdss-dsi-v-front-porch = <44>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + + qcom,mdss-dsi-on-command = [ + 39 01 00 00 00 00 06 F0 55 AA 52 08 00 + 39 01 00 00 00 00 02 C2 81 + 39 01 00 00 00 00 06 F0 55 AA 52 08 03 + 39 01 00 00 00 00 02 C6 A2 + 39 01 00 00 00 00 06 F0 55 AA 52 08 05 + 39 01 00 00 00 00 02 6F 08 + 39 01 00 00 00 00 06 EC 10 00 00 00 FF + 39 01 00 00 00 00 02 17 01 + 39 01 00 00 00 00 05 3B 00 14 00 2C + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 02 C3 19 + 39 01 00 00 00 00 02 6F 01 + 39 01 00 00 00 00 04 C5 0B 0B 0B + 39 01 00 00 00 00 05 FF AA 55 A5 80 + 39 01 00 00 00 00 02 6F 02 + 39 01 00 00 00 00 02 F5 10 + 39 01 00 00 00 00 02 6F 1B + 39 01 00 00 00 00 02 F4 55 + 39 01 00 00 00 00 02 6F 18 + 39 01 00 00 00 00 02 F8 19 + 39 01 00 00 00 00 02 6F 0F + 39 01 00 00 00 00 02 FC 00 + 39 01 00 00 00 00 05 2A 00 00 05 9F + 39 01 00 00 00 00 05 2B 00 00 0C 7F + 39 01 00 00 00 00 03 90 03 03 + 39 01 00 00 00 00 13 91 89 28 00 28 D2 + 00 02 86 04 3A 00 0A 02 AB 01 E9 10 + F0 + 39 01 00 00 00 00 02 6F 06 + 39 01 00 00 00 00 02 F3 DC + 39 01 00 00 00 00 02 26 00 + 39 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 02 53 20 + 39 01 00 00 00 00 07 51 07 FF 07 FF 0F + FF + 39 01 00 00 00 00 02 5A 01 + 39 01 00 00 00 00 02 5F 00 + 39 01 00 00 00 00 02 9C 01 + 05 01 00 00 00 00 01 2C + 39 01 00 00 00 00 02 2f 00 + 39 01 00 00 00 00 05 FF AA 55 A5 82 + 39 01 00 00 00 00 02 6F 08 + 39 01 00 00 00 00 03 F3 CC 0C + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 05 B2 55 01 FF 03 + 05 01 00 00 78 00 01 11 + 05 01 00 00 14 00 01 29 + ]; + + qcom,mdss-dsi-off-command = [ + 05 01 00 00 14 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + qcom,compression-mode = "dsc"; + qcom,mdss-dsc-slice-height = <40>; + qcom,mdss-dsc-slice-width = <720>; + qcom,mdss-dsc-slice-per-pkt = <1>; + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; + }; +}; diff --git a/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi new file mode 100644 index 00000000..7c3eadd2 --- /dev/null +++ b/display/dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi @@ -0,0 +1,119 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +&mdss_mdp { + dsi_nt37801_amoled_qsync_video: qcom,mdss_dsi_nt37801_qsync_wqhd_plus_vid { + qcom,mdss-dsi-panel-name = + "nt37801 amoled qsync video mode dsi csot panel with DSC"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-physical-type = "oled"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-border-color = <0>; + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-sec-ctrl-num = <1>; + qcom,dsi-sec-phy-num = <1>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + qcom,mdss-dsi-tx-eot-append; + qcom,adjust-timer-wakeup-ms = <1>; + + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,spr-pack-type = "pentile"; + qcom,qsync-enable; + qcom,mdss-dsi-qsync-min-refresh-rate = <80>; + qcom,mdss-dsi-display-timings { + timing@0 { + cell-index = <0>; + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <1440>; + qcom,mdss-dsi-panel-height = <3200>; + qcom,mdss-dsi-h-front-porch = <100>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <20>; + qcom,mdss-dsi-v-front-porch = <44>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + + qcom,mdss-dsi-on-command = [ + 39 01 00 00 00 00 06 F0 55 AA 52 08 00 + 39 01 00 00 00 00 02 C2 81 + 39 01 00 00 00 00 06 F0 55 AA 52 08 03 + 39 01 00 00 00 00 02 C6 A2 + 39 01 00 00 00 00 06 F0 55 AA 52 08 05 + 39 01 00 00 00 00 02 6F 08 + 39 01 00 00 00 00 06 EC 10 00 00 00 FF + 39 01 00 00 00 00 02 17 01 + 39 01 00 00 00 00 05 3B 00 14 00 2C + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 02 C3 19 + 39 01 00 00 00 00 02 6F 01 + 39 01 00 00 00 00 04 C5 0B 0B 0B + 39 01 00 00 00 00 05 FF AA 55 A5 80 + 39 01 00 00 00 00 02 6F 02 + 39 01 00 00 00 00 02 F5 10 + 39 01 00 00 00 00 02 6F 1B + 39 01 00 00 00 00 02 F4 55 + 39 01 00 00 00 00 02 6F 18 + 39 01 00 00 00 00 02 F8 19 + 39 01 00 00 00 00 02 6F 0F + 39 01 00 00 00 00 02 FC 00 + 39 01 00 00 00 00 05 2A 00 00 05 9F + 39 01 00 00 00 00 05 2B 00 00 0C 7F + 39 01 00 00 00 00 03 90 03 03 + 39 01 00 00 00 00 13 91 89 28 00 28 D2 + 00 02 86 04 3A 00 0A 02 AB 01 E9 10 + F0 + 39 01 00 00 00 00 02 6F 06 + 39 01 00 00 00 00 02 F3 DC + 39 01 00 00 00 00 02 26 00 + 39 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 02 53 20 + 39 01 00 00 00 00 07 51 07 FF 07 FF 0F + FF + 39 01 00 00 00 00 02 5A 01 + 39 01 00 00 00 00 02 5F 00 + 39 01 00 00 00 00 02 9C 01 + 05 01 00 00 00 00 01 2C + 39 01 00 00 00 00 02 2f 00 + 39 01 00 00 00 00 06 F0 55 AA 52 08 01 + 39 01 00 00 00 00 05 B2 55 01 FF 03 + 05 01 00 00 78 00 01 11 + 05 01 00 00 14 00 01 29 + ]; + + qcom,mdss-dsi-off-command = [ + 05 01 00 00 14 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + qcom,compression-mode = "dsc"; + qcom,mdss-dsc-slice-height = <40>; + qcom,mdss-dsc-slice-width = <720>; + qcom,mdss-dsc-slice-per-pkt = <1>; + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; + }; +}; diff --git a/display/sun-sde-display-cdp.dtsi b/display/sun-sde-display-cdp.dtsi index 548ccf02..dd2dac2e 100644 --- a/display/sun-sde-display-cdp.dtsi +++ b/display/sun-sde-display-cdp.dtsi @@ -90,6 +90,32 @@ qcom,platform-sec-reset-gpio = <&tlmm 97 0>; }; +&dsi_nt37801_amoled_qsync_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; + qcom,platform-sec-reset-gpio = <&tlmm 97 0>; +}; + +&dsi_nt37801_amoled_qsync_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; + qcom,platform-sec-reset-gpio = <&tlmm 97 0>; +}; + &dsi_vtdr6130_amoled_120hz_video { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; @@ -200,7 +226,9 @@ &dsi_nt37801_amoled_video &dsi_nt37801_amoled_dsc_10b_video &dsi_nt37801_amoled_video_cphy - &dsi_nt37801_amoled_cmd_spr>; + &dsi_nt37801_amoled_cmd_spr + &dsi_nt37801_amoled_qsync_cmd + &dsi_nt37801_amoled_qsync_video>; }; }; diff --git a/display/sun-sde-display-common.dtsi b/display/sun-sde-display-common.dtsi index 37faa1f5..c9bf3e20 100644 --- a/display/sun-sde-display-common.dtsi +++ b/display/sun-sde-display-common.dtsi @@ -9,6 +9,10 @@ #include "dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi" #include "dsi-panel-nt37801-dsc-10bit-video.dtsi" #include "dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi" +#include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd.dtsi" +#include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-cmd-cphy.dtsi" +#include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-video.dtsi" +#include "dsi-panel-nt37801-qsync-dsc-wqhd-plus-video-cphy.dtsi" #include "dsi-panel-sharp-dsc-4k-cmd.dtsi" #include "dsi-panel-sharp-dsc-4k-video.dtsi" #include "dsi-panel-sim-cmd-au.dtsi" @@ -540,6 +544,84 @@ }; }; +&dsi_nt37801_amoled_qsync_cmd { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1"; + qcom,esd-check-enabled; + qcom,mdss-dsi-panel-status-check-mode = "reg_read"; + qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; + qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-panel-status-value = <0x9c>; + qcom,mdss-dsi-panel-status-read-length = <1>; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a + 0b 0a 02 04 00 21 0f]; + qcom,display-topology = <2 2 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_nt37801_amoled_qsync_cmd_cphy { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + qcom,esd-check-enabled; + qcom,mdss-dsi-panel-status-check-mode = "reg_read"; + qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; + qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-panel-status-value = <0x9c>; + qcom,mdss-dsi-panel-status-read-length = <1>; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 23 22 08 + 19 08 02 04 00 00 00]; + qcom,display-topology = <2 2 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_nt37801_amoled_qsync_video { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1"; + qcom,esd-check-enabled; + qcom,mdss-dsi-panel-status-check-mode = "reg_read"; + qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; + qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-panel-status-value = <0x9c>; + qcom,mdss-dsi-panel-status-read-length = <1>; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a + 0b 0a 02 04 00 21 0f]; + qcom,display-topology = <2 2 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_nt37801_amoled_qsync_video_cphy { + qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + qcom,esd-check-enabled; + qcom,mdss-dsi-panel-status-check-mode = "reg_read"; + qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; + qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-panel-status-value = <0x9c>; + qcom,mdss-dsi-panel-status-read-length = <1>; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 25 25 08 + 19 09 02 04 00 00 00]; + qcom,display-topology = <2 2 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_sharp_4k_dsc_cmd { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; diff --git a/display/sun-sde-display-mtp.dtsi b/display/sun-sde-display-mtp.dtsi index ea129f5c..a5777c6a 100644 --- a/display/sun-sde-display-mtp.dtsi +++ b/display/sun-sde-display-mtp.dtsi @@ -81,6 +81,26 @@ qcom,platform-reset-gpio = <&tlmm 98 0>; }; +&dsi_nt37801_amoled_qsync_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + +&dsi_nt37801_amoled_qsync_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + &dsi_vtdr6130_amoled_120hz_video { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; @@ -190,7 +210,9 @@ &dsi_nt37801_amoled_video &dsi_nt37801_amoled_video_cphy &dsi_nt37801_amoled_dsc_10b_video - &dsi_nt37801_amoled_cmd_spr>; + &dsi_nt37801_amoled_cmd_spr + &dsi_nt37801_amoled_qsync_cmd + &dsi_nt37801_amoled_qsync_video>; }; }; diff --git a/display/sun-sde-display-qrd.dtsi b/display/sun-sde-display-qrd.dtsi index 38786570..a7ae76f7 100644 --- a/display/sun-sde-display-qrd.dtsi +++ b/display/sun-sde-display-qrd.dtsi @@ -81,6 +81,26 @@ qcom,platform-reset-gpio = <&tlmm 98 0>; }; +&dsi_nt37801_amoled_qsync_cmd_cphy { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + +&dsi_nt37801_amoled_qsync_video_cphy { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <10>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <8191>; + qcom,mdss-dsi-bl-inverted-dbv; + qcom,platform-reset-gpio = <&tlmm 98 0>; +}; + &dsi_vtdr6130_amoled_120hz_video { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; @@ -188,7 +208,9 @@ panel = <&dsi_nt37801_amoled_cmd_cphy &dsi_nt37801_amoled_video_cphy &dsi_nt37801_amoled_cmd - &dsi_nt37801_amoled_video>; + &dsi_nt37801_amoled_video + &dsi_nt37801_amoled_qsync_cmd_cphy + &dsi_nt37801_amoled_qsync_video_cphy>; }; };