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Merge "ARM: dts: msm: Add llcc perfmon node for kera SOC"

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QCTECMDR Service
2025-01-19 11:15:43 -08:00
committed by Gerrit - the friendly Code Review server
parent a195b36574 d310a15384
commit 24ce03fc99
1 changed files with 8 additions and 0 deletions
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qcom/kera.dtsi
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@@ -19,6 +19,8 @@
#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h> #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
#include <dt-bindings/spmi/spmi.h> #include <dt-bindings/spmi/spmi.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/power/qcom-aoss-qmp.h>
#include <dt-bindings/clock/qcom,aop-qmp.h>
/ { / {
model = "Qualcomm Technologies, Inc. Kera"; model = "Qualcomm Technologies, Inc. Kera";
@@ -1289,6 +1291,12 @@
"llcc_broadcast_or_base", "llcc_broadcast_and_base"; "llcc_broadcast_or_base", "llcc_broadcast_and_base";
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
cap-based-alloc-and-pwr-collapse; cap-based-alloc-and-pwr-collapse;
llcc_perfmon {
compatible = "qcom,llcc-perfmon";
clocks = <&aoss_qmp QDSS_CLK>;
clock-names = "qdss_clk";
};
}; };
gic-interrupt-router { gic-interrupt-router {