Merge f7e9e51aa9
on remote branch
Change-Id: Id5f86c7718bdadd0a6efca3f42b4bcadbf4884df
This commit is contained in:
@@ -104,7 +104,7 @@
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vdd-wlan-rfa2-supply = <&S7F>;
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qcom,vdd-wlan-rfa2-config = <1352000 1400000 0 0 1>;
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vdd-wlan-ant-share-supply = <&L3K>;
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qcom,vdd-wlan-ant-share-config = <1200000 1200000 0 0 1>;
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qcom,vdd-wlan-ant-share-config = <1200000 1200000 25 0 1>;
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vdd-wlan-supply = <&S7G>;
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qcom,vdd-wlan-config = <952000 1100000 0 0 1>;
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@@ -121,7 +121,7 @@
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vdd-wlan-rfa2-supply = <&S7F>;
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qcom,vdd-wlan-rfa2-config = <1328000 1340000 0 0 1>;
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vdd-wlan-ant-share-supply = <&L3K>;
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qcom,vdd-wlan-ant-share-config = <1200000 1200000 0 0 1>;
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qcom,vdd-wlan-ant-share-config = <1200000 1200000 25 0 1>;
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interconnects =
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<&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>,
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@@ -14,6 +14,34 @@
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function = "wcn_sw_ctrl";
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};
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};
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icnss_wlan_en_active: icnss_wlan_en_active {
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mux {
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pins = "gpio35";
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function = "gpio";
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};
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config {
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pins = "gpio35";
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drive-strength = <16>;
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output-high;
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bias-pull-up;
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};
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};
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icnss_wlan_en_sleep: icnss_wlan_en_sleep {
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mux {
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pins = "gpio35";
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function = "gpio";
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};
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config {
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pins = "gpio35";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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};
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};
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&soc {
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@@ -70,9 +98,12 @@
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sw-ctrl-gpio = <81>;
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/* List of GPIOs to be setup for interrupt wakeup capable */
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mpm_wake_set_gpios = <81>;
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pin_wlan-en-gpio = <&tlmm 35 0>;
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pin_sw-ctrl-gpio = <&tlmm 81 0>;
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pinctrl-names = "sw_ctrl";
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pinctrl-names = "sw_ctrl", "wlan_en_active", "wlan_en_sleep";
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pinctrl-0 = <&icnss_sw_ctrl>;
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pinctrl-1 = <&icnss_wlan_en_active>;
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pinctrl-2 = <&icnss_wlan_en_sleep>;
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interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
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@@ -14,6 +14,34 @@
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function = "wcn_sw_ctrl";
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};
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};
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icnss_wlan_en_active: icnss_wlan_en_active {
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mux {
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pins = "gpio35";
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function = "gpio";
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};
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config {
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pins = "gpio35";
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drive-strength = <16>;
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output-high;
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bias-pull-up;
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};
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};
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icnss_wlan_en_sleep: icnss_wlan_en_sleep {
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mux {
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pins = "gpio35";
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function = "gpio";
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};
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config {
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pins = "gpio35";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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};
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};
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&soc {
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@@ -66,9 +94,12 @@
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sw-ctrl-gpio =<80>;
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/* List of GPIOs to be setup for interrupt wakeup capable */
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mpm_wake_set_gpios = <80>;
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pin_wlan-en-gpio = <&tlmm 35 0>;
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pin_sw-ctrl-gpio = <&tlmm 80 0>;
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pinctrl-names = "sw_ctrl";
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pinctrl-names = "sw_ctrl", "wlan_en_active", "wlan_en_sleep";
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pinctrl-0 = <&icnss_sw_ctrl>;
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pinctrl-1 = <&icnss_wlan_en_active>;
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pinctrl-2 = <&icnss_wlan_en_sleep>;
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interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
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@@ -1,7 +1,7 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/interconnect/qcom,volcano.h>
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@@ -185,8 +185,8 @@
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cnss_pci_iommu_group0: cnss_pci_iommu_group0 {
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qcom,iommu-msi-size = <0x1000>;
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qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
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qcom,iommu-geometry = <0xa0000000 0x10010000>;
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qcom,iommu-dma-addr-pool = <0x98000000 0x18000000>;
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qcom,iommu-geometry = <0x98000000 0x18001000>;
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qcom,iommu-dma = "fastmap";
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qcom,iommu-pagetable = "coherent";
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qcom,iommu-faults = "stall-disable", "HUPCF",
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