diff --git a/qcom/sdxkova.dtsi b/qcom/sdxkova.dtsi
index bf3ad21f..fc542c6e 100644
--- a/qcom/sdxkova.dtsi
+++ b/qcom/sdxkova.dtsi
@@ -1245,6 +1245,10 @@
 	qtee_shmbridge {
 		compatible = "qcom,tee-shared-memory-bridge";
 	};
+	qcom_smcinvoke {
+		compatible = "qcom,smcinvoke";
+	};
+
 };
 
 #include "sdxkova-regulators.dtsi"
@@ -1577,6 +1581,41 @@
 		};
 	};
 
+qcom_cedev: qcedev@1de0000 {
+		compatible = "qcom,qcedev";
+		reg = <0x1de0000 0x20000>,
+			<0x1dc4000 0x28000>;
+		reg-names = "crypto-base","crypto-bam-base";
+		interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
+		qcom,bam-pipe-pair = <2>;
+		qcom,ce-hw-instance = <0>;
+		qcom,ce-device = <0>;
+		qcom,ce-hw-shared;
+		qcom,bam-ee = <0>;
+		qcom,smmu-s1-enable;
+		qcom,no-clock-support;
+		interconnect-names = "data_path";
+		interconnects = <&system_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
+		iommus = <&apps_smmu 0x0020 0x0>,
+			<&apps_smmu 0x0021 0x0>;
+		qcom,iommu-dma = "atomic";
+		dma-coherent;
+
+		qcom_cedev_ns_cb {
+			compatible = "qcom,qcedev,context-bank";
+			label = "ns_context";
+			iommus = <&apps_smmu 0x0021 0x0>;
+			dma-coherent;
+		};
+	};
+
+	qcom_rng: qrng@10c3000 {
+		compatible = "qcom,msm-rng";
+		reg = <0x10c3000 0x1000>;
+		qcom,no-qrng-config;
+		qcom,no-clock-support;
+	};
+
 	aoss_qmp: power-controller@c300000 {
 		compatible = "qcom,aoss-qmp";
 		reg = <0x0 0xc310000 0x0 0x1000>;