Add 'qcom/mm/' from DISPLAY.LA.5.0.r1-06600-pakala.0 of https://git.codelinaro.org/clo/la/platform/vendor/opensource/mm-devicetree

git-subtree-dir: qcom/mm
git-subtree-mainline: ee7d6850f6
git-subtree-split: f9e97b38ab

qcom/mm/Kbuild

@@ -0,0 +1,31 @@
+ifeq ($(CONFIG_ARCH_SUN), y)
+	dtbo-y += hw_fence/sun-hw-fence.dtbo \
+		sun-mm-cdp-kiwi-overlay.dtbo \
+		sun-mm-cdp-kiwi-v8-overlay.dtbo \
+		sun-mm-cdp-nfc-overlay.dtbo \
+		sun-mm-cdp-overlay.dtbo \
+		sun-mm-cdp-v8-overlay.dtbo \
+		sun-mm-mtp-kiwi-overlay.dtbo \
+		sun-mm-mtp-kiwi-v8-overlay.dtbo \
+		sun-mm-mtp-nfc-overlay.dtbo \
+		sun-mm-mtp-overlay.dtbo \
+		sun-mm-mtp-v8-overlay.dtbo \
+		sun-mm-mtp-qmp1000-overlay.dtbo \
+		sun-mm-mtp-qmp1000-v8-overlay.dtbo \
+		sun-mm-qrd-sku1-overlay.dtbo \
+		sun-mm-qrd-sku1-v8-overlay.dtbo \
+		sun-mm-qrd-sku2-v8-overlay.dtbo \
+		sun-mm-rumi-overlay.dtbo \
+		sun-mm-rcm-overlay.dtbo \
+		sun-mm-atp-overlay.dtbo \
+		sun-mm-cdp-ganges-nodisplay-overlay.dtbo \
+		sun-mm-mtp-3-5mm-overlay.dtbo \
+		sun-mm-rcm-kiwi-overlay.dtbo \
+		sun-mm-rcm-kiwi-v8-overlay.dtbo \
+		sun-mm-rcm-v8-overlay.dtbo \
+		sun-mm-cdp-no-display-overlay.dtbo
+endif
+
+always-y    := $(dtb-y) $(dtbo-y)
+subdir-y    := $(dts-dirs)
+clean-files    := *.dtb *.dtbo

qcom/mm/Makefile

@@ -0,0 +1,9 @@
+KBUILD_OPTIONS+=KBUILD_EXTMOD_DTS=.
+
+all: dtbs
+
+clean:
+	$(MAKE) -C $(KERNEL_SRC) M=$(M) clean
+
+%:
+	$(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS)

qcom/mm/bindings/hw-fence.yaml

@@ -0,0 +1,227 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hw-fence.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HW Fence
+
+maintainers:
+  - Grace An <quic_gracan@quicinc.com>
+  - Kalyan Thota <quic_kalyant@quicinc.com>
+
+description: |
+  HW Fence implements Linux APIs to initialize, deinitialize, register-for-signal, and
+  overall manage the hw-fences, for hw-to-hw communcation between hw cores.
+
+properties:
+  compatible:
+    const: qcom,msm-hw-fence
+
+  qcom,ipcc-reg:
+    description: Registers ranges for ipcc registers.
+
+  qcom,hw-fence-table-entries:
+    description: A u32 indicating number of entries for the hw-fence table
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+  qcom,hw-fence-queue-entries:
+    description: A u32 indicating default number of entries for the Queues
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+  hw_fence@0:
+    description: Doorbell configuration to communicate with secondary vm through hypervisor.
+    type: object
+    properties:
+      compatible:
+        const: qcom,msm-hw-fence-db
+      qcom,master: true
+      gunyah-label:
+        $ref: /schemas/types.yaml#/definitions/uint32
+      peer-name:
+        $ref: /schemas/types.yaml#/definitions/uint32
+
+  hw_fence@1:
+    description: |
+      Carved-out memory-mapping region, to be used for mapping of global tables and
+      queues used by the hw-fence driver and fence controller running in secondary vm.
+    type: object
+    properties:
+      compatible:
+        const: qcom,msm-hw-fence-mem
+      qcom,master: true
+      gunyah-label:
+        $ref: /schemas/types.yaml#/definitions/uint32
+      peer-name:
+        $ref: /schemas/types.yaml#/definitions/uint32
+      shared-buffer:
+        $ref: /schemas/types.yaml#/definitions/phandle
+
+  qcom,hw-fence-ipc-ver:
+    description: |
+      A u32 indicating ipc version. If not provided in device-tree, this is read from
+      the registers.
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+  soccp_controller:
+    description: phandle for the soccp controller.
+    $ref: /schemas/types.yaml#/definitions/phandle
+
+  interrupts:
+    description: Interrupt associated with APSS NS0 (to receive interrupts from SOCCP).
+
+  interrupt-controller: true
+    description: Mark the device node as an interrupt controller.
+
+  '#interrupt-cells':
+    description: Should be one. The first cell is interrupt number.
+    const: 1
+
+  iommus:
+    description: Specifies the SID's used by this context bank.
+
+patternProperties:
+  "qcom,hw\-fence\-client\-type\-+\w":
+    description: |
+      A list of four u32 describing client properties that
+      override default values specified by the driver for some clients.
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    items:
+    - description: number of clients for given type
+    - enum:
+      - 1
+      - 2
+      description: 1 (Tx) or 2 (Rx and Tx)
+    - description: number of entries per client queue
+    - enum:
+      - 0
+      - 1
+      description: |
+        bool indicating whether tx queue wr_idx update is skipped within hw fence
+        driver and hfi_header->tx_wm is used instead
+
+  "qcom,hw\-fence\-client\-type\-+\w+\-extra":
+    description: |
+      A list of four u32 indicating extra client queue properties.Later u32 values do not need to
+      be provided to provide values for earlier u32 values.
+    minItems: 1
+    maxItems: 4
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    items:
+    - description: size of padding between queue table header and first queue header in bytes
+    - description: size of padding between queue header(s) and first queue payload in bytes
+    - description: start_index for TxQ rd_wr_index
+    - enum:
+      - 0
+      - 1
+      description: |
+        bool indicating whether TxQ rd_wr_idx indexes by payloads instead of
+        default dwords
+
+required:
+  - compatible
+  - qcom,ipcc-reg
+  - qcom,hw-fence-table-entries
+  - qcom,hw-fence-queue-entries
+  - hw_fence@1
+
+if:
+  required:
+    - soccp-controller
+then:
+  required:
+    - interrupts
+    - interrupt-controller
+    - '#interrupt-cells'
+    - iommus
+    properties:
+      hw_fence@0: false
+else:
+  required:
+    - hw_fence@0
+  properties:
+    - interrupts: false
+    - interrupt-controller: false
+    - '#interrupt-cells': false
+    - iommus: false
+
+additionalProperties: false
+
+examples:
+  - |
+    msm_hw_fence: qcom,hw-fence {
+       compatible = "qcom,msm-hw-fence";
+       status = "ok";
+
+       qcom,ipcc-reg = <0x400000 0x100000>;
+       qcom,hw-fence-table-entries = <8192>;
+       qcom,hw-fence-queue-entries = <800>;
+
+       # time register
+       qcom,qtime-reg = <0xC221000 0x1000>;
+
+       # ipc version
+       qcom,hw-fence-ipc-ver = <0x20003>;
+
+       # client queues: clients_num, queues_num, queue_entries, skip_txq_wr_idx
+       qcom,hw-fence-client-type-dpu = <4 2 128 0>;
+       qcom,hw-fence-client-type-ife2 = <3 1 64 1>;
+
+       # extra client queue properties
+       qcom,hw-fence-client-type-ife2-extra = <20 28 1 1>;
+
+       # haven doorbell specific
+       hw_fence@0 {
+         compatible = "qcom,msm-hw-fence-db";
+         qcom,master;
+         gunyah-label = <6>;
+         peer-name = <3>;
+       };
+
+       # haven io-mem specific
+       hw_fence@1 {
+         compatible = "qcom,msm-hw-fence-mem";
+         qcom,master;
+         gunyah-label = <5>;
+         peer-name = <3>;
+         shared-buffer = <&hwfence_shbuf>;
+       };
+    };
+
+  - |
+    msm_hw_fence: qcom,hw-fence {
+      compatible = "qcom,msm-hw-fence";
+      status = "ok";
+
+      # SOCCP properties
+      interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+      interrupt-controller;
+      #interrupt-cells = <1>;
+      iommus = <&apps_smmu 0x562 0x1>;
+      soccp_controller = <&soccp_pas>;
+
+      qcom,ipcc-reg = <0x400000 0x100000>;
+      qcom,hw-fence-table-entries = <8192>;
+      qcom,hw-fence-queue-entries = <800>;
+
+      # time register
+      qcom,qtime-reg = <0xC221000 0x1000>;
+
+      # ipc version
+      qcom,hw-fence-ipc-ver = <0x20003>;
+
+      # base client queue properties
+      qcom,hw-fence-client-type-dpu = <4 2 128 0>;
+      qcom,hw-fence-client-type-ife2 = <3 1 64 1>;
+
+      # extra client queue properties
+      qcom,hw-fence-client-type-ife2-extra = <20 28 1 1>;
+
+      # haven io-mem specific
+      hw_fence@1 {
+        compatible = "qcom,msm-hw-fence-mem";
+        qcom,master;
+        shared-buffer = <&hwfence_shbuf>;
+      };
+    };
+...

qcom/mm/hw_fence/sun-hw-fence.dts

@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun SoC";
+	compatible = "qcom,sun";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+	qcom,board-id = <0 0>;
+};

qcom/mm/hw_fence/sun-hw-fence.dtsi

@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+&soc {
+	msm_hw_fence: qcom,hw-fence {
+		compatible = "qcom,msm-hw-fence";
+		status = "ok";
+
+		/* SOCCP properties */
+		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		iommus = <&apps_smmu 0x562 0x1>;
+		dma-coherent;
+		soccp_controller = <&soccp_pas>;
+
+		qcom,hw-fence-table-entries = <8192>;
+		qcom,hw-fence-queue-entries = <800>;
+		qcom,ipcc-reg = <0x400000 0x140000>;
+
+		/* time register */
+		qcom,qtime-reg = <0xC221000 0x1000>;
+
+		/* ipc version */
+		qcom,hw-fence-ipc-ver = <0x20A02>;
+
+		/* base client queue properties */
+		qcom,hw-fence-client-type-dpu = <6 2 128 1>;
+		qcom,hw-fence-client-type-ipe = <1 2 800 0>;
+		qcom,hw-fence-client-type-vpu = <1 2 800 0>;
+		qcom,hw-fence-client-type-ife0 = <1 1 128 1>;
+
+		/* extra client queue properties */
+		qcom,hw-fence-client-type-ife0-extra = <20 28 1 1>;
+
+		/* haven io-mem specific */
+		hw_fence@1 {
+			compatible = "qcom,msm-hw-fence-mem";
+			qcom,master;
+			shared-buffer = <&hwfence_shbuf>;
+		};
+	};
+};

qcom/mm/sun-mm-atp-overlay.dts

@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun ATP";
+	compatible = "qcom,sun-atp", "qcom,sun", "qcom,sunp-atp", "qcom,sunp", "qcom,atp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>;
+	qcom,board-id = <0x10021 0>;
+};

qcom/mm/sun-mm-cdp-ganges-nodisplay-overlay.dts

@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun CDP No Display";
+	compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+	qcom,board-id = <0x30001 0>;
+};

qcom/mm/sun-mm-cdp-kiwi-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun CDP Kiwi WLAN";
+	compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp",
+			   "qcom,cdp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x20001 0>;
+};

qcom/mm/sun-mm-cdp-kiwi-v8-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun CDP Kiwi WLAN V8 Power Grid";
+	compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp",
+			   "qcom,cdp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x60001 0>;
+};

qcom/mm/sun-mm-cdp-nfc-overlay.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun CDP SN300 NFC";
+	compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x40001 0>;
+};

qcom/mm/sun-mm-cdp-no-display-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun CDP No Display";
+	compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp",
+			   "qcom,cdp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x30001 0>;
+};

qcom/mm/sun-mm-cdp-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun CDP";
+	compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp",
+			   "qcom,cdp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <1 0>;
+};

qcom/mm/sun-mm-cdp-v8-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun CDP V8 Power Grid";
+	compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp",
+			   "qcom,cdp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x50001 0>;
+};

qcom/mm/sun-mm-mtp-3-5mm-overlay.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun MTP with 3.5mm";
+	compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x60008 0>;
+};

qcom/mm/sun-mm-mtp-kiwi-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun MTP Kiwi WLAN";
+	compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp",
+			   "qcom,mtp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x20008 0>;
+};

qcom/mm/sun-mm-mtp-kiwi-v8-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun MTP Kiwi WLAN V8 Power Grid";
+	compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp",
+			   "qcom,mtp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x50008 0>;
+};

qcom/mm/sun-mm-mtp-nfc-overlay.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun MTP SN300 NFC";
+	compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x30008 0>;
+};

qcom/mm/sun-mm-mtp-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun MTP";
+	compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp",
+			   "qcom,mtp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <8 0>;
+};

qcom/mm/sun-mm-mtp-qmp1000-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun MTP QMP1000";
+	compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp",
+			   "qcom,mtp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x108 0>;
+};

qcom/mm/sun-mm-mtp-qmp1000-v8-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun MTP QMP1000 V8 Power Grid";
+	compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp",
+			   "qcom,mtp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x40108 0>;
+};

qcom/mm/sun-mm-mtp-v8-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun MTP V8 Power Grid";
+	compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp",
+			   "qcom,mtp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x40008 0>;
+};

qcom/mm/sun-mm-qrd-sku1-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun QRD SKU1";
+	compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp",
+			   "qcom,qrd";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x1000B 0>;
+};

qcom/mm/sun-mm-qrd-sku1-v8-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun QRD SKU1 V8 Power Grid";
+	compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp",
+			   "qcom,qrd";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x3000B 0>;
+};

qcom/mm/sun-mm-qrd-sku2-v8-overlay.dts

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun QRD SKU2 V8 Power Grid";
+	compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp",
+			   "qcom,qrd";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x2000B 0>;
+};

qcom/mm/sun-mm-rcm-kiwi-overlay.dts

@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun RCM Kiwi WLAN";
+	compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>;
+	qcom,board-id = <0x40015 0>;
+};

qcom/mm/sun-mm-rcm-kiwi-v8-overlay.dts

@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun RCM Kiwi WLAN V8 Power Grid";
+	compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>;
+	qcom,board-id = <0x20015 0>;
+};

qcom/mm/sun-mm-rcm-overlay.dts

@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun RCM";
+	compatible = "qcom,sun-rcm", "qcom,sun", "qcom,rcm";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>;
+	qcom,board-id = <0x15 0>;
+};

qcom/mm/sun-mm-rcm-v8-overlay.dts

@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun RCM V8 Power Grid";
+	compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>;
+	qcom,board-id = <0x30015 0>;
+};

qcom/mm/sun-mm-rumi-overlay.dts

@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "hw_fence/sun-hw-fence.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun RUMI";
+	compatible = "qcom,sun-rumi", "qcom,sun", "qcom,rumi";
+	qcom,msm-id = <618 0x10000>;
+	qcom,board-id = <15 0>;
+};