samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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arm64: dts: msm: Enable compilation of trusted-vm dt project for kera

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and tuna

Enable compilation of trusted-vm dt files in opensource dsp-devicetree.

Change-Id: I41929b0ac907efb3610bc1c4da91dc95b73bee4a
Signed-off-by: Patan Saddam <quic_psaddam@quicinc.com>
This commit is contained in:
Patan Saddam
2024-11-28 19:41:05 +05:30
parent 4ba1773deb
commit 1b0cf025ed
6 changed files with 2 additions and 113 deletions
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8
Kbuild
View File

@@ -19,20 +19,12 @@ endif
endif
ifeq ($(CONFIG_ARCH_TUNA), y)
ifeq ($(CONFIG_ARCH_QTI_VM), y)
dtbo-y += tuna/tuna-dsp-trustedvm.dtbo
else
dtbo-y += tuna/tuna-dsp.dtbo
endif
endif
ifeq ($(CONFIG_ARCH_KERA), y)
ifeq ($(CONFIG_ARCH_QTI_VM), y)
dtbo-y += kera/kera-dsp-trustedvm.dtbo
else
dtbo-y += kera/kera-dsp.dtbo
endif
endif
ifeq ($(CONFIG_ARCH_MONACO), y)
dtbo-y += monaco/monaco-dsp.dtbo

15
kera/kera-dsp-trustedvm.dts
View File

@@ -1,15 +0,0 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "kera-dsp-trustedvm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Kera - TrustedVM";
compatible = "qcom,kera";
qcom,msm-id = <659 0x10000>;
};

37
kera/kera-dsp-trustedvm.dtsi
View File

@@ -1,37 +0,0 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/soc/qcom,ipcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
&soc {
fastrpc_gen_pool_region: fastrpc_gen_pool_region {
iommu-addresses = <&fastrpc_compute_cb1 0x8000 0x11000>;
};
fastrpc_compute_cb1: compute-cb@13 {
compatible = "qcom,fastrpc-compute-cb";
reg = <11>;
iommus = <&apps_smmu 0xC0B 0x0>;
memory-region = <&fastrpc_gen_pool_region>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
qrtr-gen-pool = <&fastrpc_compute_cb1>;
frpc-gen-addr-pool = <0x8000 0x9000>;
pd-type = <4>; /* SECURE_STATICPD */
};
qrtr-genpool {
compatible = "qcom,qrtr-genpool";
gen-pool = <&fastrpc_compute_cb1>;
interrupt-parent = <&ipcc_mproc_ns1>;
interrupts = <IPCC_CLIENT_CDSP 0 IRQ_TYPE_EDGE_RISING>,
<IPCC_CLIENT_CDSP 1 IRQ_TYPE_EDGE_RISING>;
mboxes = <&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 0>,
<&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 1>;
};
};

3
sun/sun-dsp-trustedvm.dts
View File

@@ -13,5 +13,6 @@
compatible = "qcom,sun";
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
<0x100026a 0x10000>, <0x100026a 0x20000>,
<0x100027f 0x10000>, <0x100027f 0x20000>;
<0x100027f 0x10000>, <0x100027f 0x20000>, <655 0x10000>,
<681 0x10000>, <694 0x10000>,<659 0x10000>, <686 0x10000>;
};

15
tuna/tuna-dsp-trustedvm.dts
View File

@@ -1,15 +0,0 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "tuna-dsp-trustedvm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Tuna - TrustedVM";
compatible = "qcom,tuna";
qcom,msm-id = <655 0x10000>;
};

37
tuna/tuna-dsp-trustedvm.dtsi
View File

@@ -1,37 +0,0 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/soc/qcom,ipcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
&soc {
fastrpc_gen_pool_region: fastrpc_gen_pool_region {
iommu-addresses = <&fastrpc_compute_cb1 0x8000 0x11000>;
};
fastrpc_compute_cb1: compute-cb@13 {
compatible = "qcom,fastrpc-compute-cb";
reg = <11>;
iommus = <&apps_smmu 0xC0B 0x0>;
memory-region = <&fastrpc_gen_pool_region>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>; /* Set MAX alignment to 2 MB*/
qrtr-gen-pool = <&fastrpc_compute_cb1>;
frpc-gen-addr-pool = <0x8000 0x9000>;
pd-type = <4>; /* SECURE_STATICPD */
};
qrtr-genpool {
compatible = "qcom,qrtr-genpool";
gen-pool = <&fastrpc_compute_cb1>;
interrupt-parent = <&ipcc_mproc_ns1>;
interrupts = <IPCC_CLIENT_CDSP 0 IRQ_TYPE_EDGE_RISING>,
<IPCC_CLIENT_CDSP 1 IRQ_TYPE_EDGE_RISING>;
mboxes = <&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 0>,
<&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 1>;
};
};