ARM: dts: msm: Unstub gpucc for Sun

Unstub gpucc for Sun device.

Change-Id: I11919b69830038bcd6c97a593191bdb08c6e4057
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
This commit is contained in:
Xubin Bai
2023-07-31 23:17:35 -07:00
parent 1b4014bdfe
commit 1a2b543114

View File

@@ -570,8 +570,17 @@
}; };
gpucc: clock-controller@3d90000 { gpucc: clock-controller@3d90000 {
compatible = "qcom,dummycc"; compatible = "qcom,sun-gpucc", "syscon";
clock-output-names = "gpucc_clocks"; reg = <0x3d90000 0x9800>;
reg-name = "cc_base";
vdd_cx-supply = <&VDD_CX_LEVEL>;
vdd_mx-supply = <&VDD_MX_LEVEL>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_GPU_GPLL0_CLK_SRC>,
<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
clock-names = "bi_tcxo",
"gpll0_out_main",
"gpll0_out_main_div";
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
}; };
@@ -767,14 +776,23 @@
}; };
gpu_cc_cx_gdsc: qcom,gdsc@3d99080 { gpu_cc_cx_gdsc: qcom,gdsc@3d99080 {
compatible = "qcom,stub-regulator"; compatible = "qcom,gdsc";
reg = <0x3d99080 0x4>;
regulator-name = "gpu_cc_cx_gdsc"; regulator-name = "gpu_cc_cx_gdsc";
parent-supply = <&VDD_CX_LEVEL>;
hw-ctrl-addr = <&gpu_cc_cx_gdsc_hw_ctrl>;
qcom,retain-regs;
qcom,support-cfg-gdscr;
}; };
/* GX_CLKCTL GDSCs */ /* GX_CLKCTL GDSCs */
gx_clkctl_gx_gdsc: qcom,gdsc@3d68024 { gx_clkctl_gx_gdsc: qcom,gdsc@3d68024 {
compatible = "qcom,stub-regulator"; compatible = "qcom,gdsc";
reg = <0x3d68024 0x4>;
regulator-name = "gx_clkctl_gx_gdsc"; regulator-name = "gx_clkctl_gx_gdsc";
parent-supply = <&VDD_GFX_GFX_MXC_VOTER_LEVEL>;
qcom,retain-regs;
qcom,support-cfg-gdscr;
}; };
/* VIDEO_CC GDSCs */ /* VIDEO_CC GDSCs */