From 189842f911ff5463673e6c7ffd7c6839fd555bc2 Mon Sep 17 00:00:00 2001 From: Abhinav Saurabh Date: Mon, 13 Jan 2025 15:07:32 +0530 Subject: [PATCH] ARM: dts: msm: add 111 topology support for VTDR6130 panel on Kera Add 111 topology support for VTDR6130 panel on Kera target. Change-Id: I4daae3b5f1db36eec8b256a1c8e53540f39c8e1b Signed-off-by: Abhinav Saurabh --- display/kera-sde-display-common.dtsi | 35 ++++++++++++++++++---------- 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/display/kera-sde-display-common.dtsi b/display/kera-sde-display-common.dtsi index 8fec279c..cee0fa2e 100644 --- a/display/kera-sde-display-common.dtsi +++ b/display/kera-sde-display-common.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "dsi-panel-sim-cmd.dtsi" @@ -135,7 +135,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>; }; @@ -143,7 +144,8 @@ timing@1 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>; }; @@ -151,7 +153,8 @@ timing@2 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>; }; @@ -159,7 +162,8 @@ timing@3 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <813936000 818175250 822414500>; }; @@ -190,7 +194,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; qcom,dsi-dyn-clk-list = <847480320 844537680 841595040>; }; @@ -214,21 +219,24 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07 06 07 02 04 00 16 0b]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; timing@1 { qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07 06 07 02 04 00 16 0b]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; timing@2 { qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07 06 07 02 04 00 16 0b]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; }; @@ -255,7 +263,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 19 06 06 15 20 07 06 07 02 04 00 16 0b]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; }; @@ -381,7 +390,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; }; @@ -403,7 +413,8 @@ timing@0 { qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07 07 08 02 04 00 19 0c]; - qcom,display-topology = <2 2 1>; + qcom,display-topology = <2 2 1>, + <1 1 1>; qcom,default-topology-index = <0>; }; };