ARM: dts: msm: add support for sw fuse for Tuna target
Add sw fuse range to dts file for Tuna target. The swfuse_phys is only needed in primary VM. Change-Id: Ida97d23c3f0634864829ea8f7ea91e388062eb4c Signed-off-by: Sanskar Omar <quic_sansomar@quicinc.com> Signed-off-by: lnxdisplay <lnxdisplay@localhost>
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@@ -13,11 +13,13 @@
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reg = <0x0ae00000 0x93800>,
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reg = <0x0ae00000 0x93800>,
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<0x0aeb0000 0x2008>,
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<0x0aeb0000 0x2008>,
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<0x0af80000 0x7000>,
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<0x0af80000 0x7000>,
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<0x400000 0x2000>;
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<0x400000 0x2000>,
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<0x0af50000 0x140>;
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reg-names = "mdp_phys",
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reg-names = "mdp_phys",
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"vbif_phys",
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"vbif_phys",
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"regdma_phys",
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"regdma_phys",
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"ipcc_reg";
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"ipcc_reg",
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"swfuse_phys";
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/* interrupt config */
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/* interrupt config */
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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@@ -231,7 +231,7 @@
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qti,smmu-proxy-cb-id = <QTI_SMMU_PROXY_DISPLAY_CB>;
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qti,smmu-proxy-cb-id = <QTI_SMMU_PROXY_DISPLAY_CB>;
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qcom,sde-vm-exclude-reg-names = "ipcc_reg";
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qcom,sde-vm-exclude-reg-names = "ipcc_reg", "swfuse_phys";
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/* data and reg bus scale settings */
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/* data and reg bus scale settings */
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interconnects = <&mmss_noc MASTER_MDP &gem_noc SLAVE_LLCC>,
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interconnects = <&mmss_noc MASTER_MDP &gem_noc SLAVE_LLCC>,
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