From 164a485a57dd9acd4093969220aaa4a96efd8533 Mon Sep 17 00:00:00 2001
From: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
Date: Tue, 10 Sep 2024 21:44:04 +0530
Subject: [PATCH] ARM: dts: msm: Add shared imem node for sdxkova SoC

Add shared internal memory nodes for sdxkova SoC.

Change-Id: I0565f4c6d87e2d3bcb016797815ba004f232d47c
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
---
 qcom/sdxkova.dtsi | 48 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/qcom/sdxkova.dtsi b/qcom/sdxkova.dtsi
index b47f427a..68247f15 100644
--- a/qcom/sdxkova.dtsi
+++ b/qcom/sdxkova.dtsi
@@ -408,6 +408,54 @@
 		cap-based-alloc-and-pwr-collapse;
 	};
 
+	qcom,msm-imem@14680000 {
+		compatible = "qcom,msm-imem";
+		reg = <0x0 0x14680000 0x0 0x1000>;
+		ranges = <0x0 0x0 0x14680000 0x0 0x1000>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+
+		mem_dump_table@10  {
+			compatible = "qcom,msm-imem-mem_dump_table";
+			reg = <0x0 0x10 0x0 0x8>;
+		};
+
+		restart_reason@65c {
+			compatible = "qcom,msm-imem-restart_reason";
+			reg = <0x0 0x65c 0x0 0x4>;
+		};
+
+		dload_type@1c {
+			compatible = "qcom,msm-imem-dload-type";
+			reg = <0x0 0x1c 0x0 0x4>;
+		};
+
+		boot_stats@6b0 {
+			compatible = "qcom,msm-imem-boot_stats";
+			reg = <0x0 0x6b0 0x0 0x20>;
+		};
+
+		kaslr_offset@6d0 {
+			compatible = "qcom,msm-imem-kaslr_offset";
+			reg = <0x0 0x6d0 0x0 0xc>;
+		};
+
+		pil@94c {
+			compatible = "qcom,pil-reloc-info";
+			reg = <0x0 0x94c 0x0 0xc8>;
+		};
+
+		pil@6dc {
+			compatible = "qcom,msm-imem-pil-disable-timeout";
+			reg = <0x0 0x6dc 0x0 0x4>;
+		};
+
+		diag_dload@c8 {
+			compatible = "qcom,msm-imem-diag-dload";
+			reg = <0x0 0xc8 0x0 0xc8>;
+		};
+	};
+
 	tcsr_mutex_block: syscon@1f40000 {
 		compatible = "syscon";
 		reg = <0x0 0x1f40000 0x0 0x20000>;