samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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Merge fdeae3f72d on remote branch

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Change-Id: I0e6327d156b7fa2ea20aceaf1a4d90cd9608cef8
This commit is contained in:
Linux Build Service Account
2024-08-07 15:05:37 -07:00
parent ec398eeaf2 fdeae3f72d
commit 160a156770
16 changed files with 540 additions and 4 deletions
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11
Kbuild
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@@ -15,6 +15,12 @@ ifeq ($(CONFIG_ARCH_X1E80100),y)
dtbo-y += x1e80100-kiwi-cnss.dtbo dtbo-y += x1e80100-kiwi-cnss.dtbo
endif endif
ifeq ($(CONFIG_ARCH_RAVELIN),y)
dtbo-y += ravelin-idp-adrastea.dtbo
dtbo-y += ravelin-qrd-adrastea.dtbo
dtbo-y += ravelin-atp-adrastea.dtbo
endif
ifeq ($(CONFIG_ARCH_PARROT),y) ifeq ($(CONFIG_ARCH_PARROT),y)
dtbo-y += parrot-idp-wcn3990.dtbo dtbo-y += parrot-idp-wcn3990.dtbo
dtbo-y += parrot-idp-wcn6750.dtbo dtbo-y += parrot-idp-wcn6750.dtbo
@@ -26,6 +32,11 @@ dtbo-y += parrot-idp-wcn6755.dtbo
dtbo-y += parrot-qrd-wcn6755.dtbo dtbo-y += parrot-qrd-wcn6755.dtbo
endif endif
ifeq ($(CONFIG_ARCH_VOLCANO),y)
dtbo-y += volcano-qca6750.dtbo
dtbo-y += volcano6i-peach-cnss.dtbo
endif
always-y := $(dtb-y) $(dtbo-y) always-y := $(dtb-y) $(dtbo-y)
subdir-y := $(dts-dirs) subdir-y := $(dts-dirs)
clean-files := *.dtb *.dtbo clean-files := *.dtb *.dtbo

17
parrot-wcn3990.dtsi
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@@ -80,4 +80,21 @@
qcom,bt-vdd-pa-config = <3000000 3312000 1 0>; qcom,bt-vdd-pa-config = <3000000 3312000 1 0>;
qcom,bt-vdd-xtal-config = <1700000 1900000 1 0>; qcom,bt-vdd-xtal-config = <1700000 1900000 1 0>;
}; };
slim_msm: slim@3340000 {
status = "ok";
ngd@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <1>;
//slimbus child nodes
slimbus: btfmslim-driver {
compatible = "slim217,221";
reg = <1 0>;
qcom,btslim-address = <0x0>; /* BT SLIM EP address*/
qcom,btslimtx-channels = <159 160>;
qcom,btslimrx-channels = <157 158>;
};
};
};
}; };

17
parrot-wcn6750.dtsi
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@@ -38,6 +38,23 @@
//qcom,bt-vdd-asd-config = <2800000 3544000 0 1>; //qcom,bt-vdd-asd-config = <2800000 3544000 0 1>;
}; };
slim_msm: slim@3340000 {
status = "ok";
ngd@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <1>;
//slimbus child nodes
slimbus: btfmslim-driver {
compatible = "slim217,221";
reg = <1 0>;
qcom,btslim-address = <0x0>; /* BT SLIM EP address*/
qcom,btslimtx-channels = <159 160>;
qcom,btslimrx-channels = <157 158>;
};
};
};
qcom,smp2p-wpss { qcom,smp2p-wpss {
smp2p_wlan_2_in: qcom,smp2p-wlan-2-in { smp2p_wlan_2_in: qcom,smp2p-wlan-2-in {
qcom,entry-name = "wlan_soc_wake"; qcom,entry-name = "wlan_soc_wake";

17
parrot-wcn6755.dtsi
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@@ -38,6 +38,23 @@
//qcom,bt-vdd-asd-config = <2800000 3544000 0 1>; //qcom,bt-vdd-asd-config = <2800000 3544000 0 1>;
}; };
slim_msm: slim@3340000 {
status = "ok";
ngd@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <1>;
//slimbus child nodes
slimbus: btfmslim-driver {
compatible = "slim217,221";
reg = <1 0>;
qcom,btslim-address = <0x0>; /* BT SLIM EP address*/
qcom,btslimtx-channels = <159 160>;
qcom,btslimrx-channels = <157 158>;
};
};
};
qcom,smp2p-wpss { qcom,smp2p-wpss {
smp2p_wlan_2_in: qcom,smp2p-wlan-2-in { smp2p_wlan_2_in: qcom,smp2p-wlan-2-in {
qcom,entry-name = "wlan_soc_wake"; qcom,entry-name = "wlan_soc_wake";

67
ravelin-adrastea.dtsi Normal file
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@@ -0,0 +1,67 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
&reserved_memory {
wlan_msa_mem: wlan_msa_mem_region@82a00000 {
no-map;
reg = <0x0 0x82a00000 0x0 0x300000>;
};
};
&soc {
wpss_pas: remoteproc-wpss@8a00000 {
firmware-name = "adrastea/wpss.mdt";
};
icnss: qcom,icnss@22800000 {
compatible = "qcom,icnss";
reg = <0x22800000 0x800000>;
reg-names = "membase";
qcom,rproc-handle = <&wpss_pas>;
iommus = <&apps_smmu 0x4c0 0x1>;
interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH /* CE0 */ >,
<GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH /* CE1 */ >,
<GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH /* CE2 */ >,
<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH /* CE3 */ >,
<GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH /* CE4 */ >,
<GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH /* CE5 */ >,
<GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH /* CE6 */ >,
<GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH /* CE7 */ >,
<GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH /* CE8 */ >,
<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH /* CE9 */ >,
<GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH /* CE10 */ >,
<GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH /* CE11 */ >;
qcom,iommu-dma = "fastmap";
qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
qcom,iommu-geometry = <0xa0000000 0x10000000>;
qcom,fw-prefix;
qcom,wlan;
bdf-download-support;
wpss-support-enable;
qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
vdd-cx-mx-supply = <&L11B>;
vdd-1.8-xo-supply = <&L23B>;
vdd-1.3-rfa-supply = <&L14B>;
vdd-3.3-ch0-supply = <&L7E>;
qcom,vdd-cx-mx-config = <0 0>;
qcom,vdd-3.3-ch0-config = <3000000 3312000>;
qcom,smem-states = <&smp2p_wlan_1_out 0>;
qcom,smem-state-names = "wlan-smp2p-out";
qcom,smp2p_map_wlan_1_in {
interrupts-extended = <&smp2p_wlan_1_in 0 0>,
<&smp2p_wlan_1_in 1 0>;
interrupt-names = "qcom,smp2p-force-fatal-error",
"qcom,smp2p-early-crash-ind";
};
};
};

17
ravelin-atp-adrastea.dts Normal file
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@@ -0,0 +1,17 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "ravelin-adrastea.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Ravelin ATP";
compatible = "qcom,ravelin", "qcom,ravelin-atp", "qcom,atp";
qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>;
qcom,board-id = <33 0>;
};

17
ravelin-idp-adrastea.dts Normal file
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@@ -0,0 +1,17 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "ravelin-adrastea.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Ravelin IDP";
compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>;
qcom,board-id = <34 0>, <34 0x601>, <34 2>;
};

17
ravelin-qrd-adrastea.dts Normal file
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@@ -0,0 +1,17 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "ravelin-adrastea.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Ravelin QRD";
compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
qcom,msm-id = <568 0x10000>, <581 0x10000>, <582 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>;
qcom,board-id = <0x1000B 0>, <0x1000B 0x600>;
};

2
sun-kiwi-cnss-v8.dts
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@@ -16,5 +16,5 @@
<639 0x10000>, <639 0x20000>, <639 0x10000>, <639 0x20000>,
<0x100026a 0x10000>, <0x100026a 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>,
<0x100027f 0x10000>, <0x100027f 0x20000>; <0x100027f 0x10000>, <0x100027f 0x20000>;
qcom,board-id = <0x60001 0>, <0x50008 0>, <0x20015 0>; qcom,board-id = <0x60001 0>, <0x50008 0>, <0x20015 0>, <0x60108 0>;
}; };

3
sun-peach-cnss-v8.dts
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@@ -17,5 +17,6 @@
<0x100026a 0x10000>, <0x100026a 0x20000>, <0x100026a 0x10000>, <0x100026a 0x20000>,
<0x100027f 0x10000>, <0x100027f 0x20000>; <0x100027f 0x10000>, <0x100027f 0x20000>;
qcom,board-id = <0x50001 0>, <0x40008 0>, <0x3000B 0>, <0x2000B 0>, qcom,board-id = <0x50001 0>, <0x40008 0>, <0x3000B 0>, <0x2000B 0>,
<0x30008 0>, <0x40001 0>, <0x30015 0>, <0x60008 0>; <0x30008 0>, <0x40001 0>, <0x30015 0>, <0x60008 0>,
<0x10021 0>, <0x3000B 1>, <0x40108 0>;
}; };

2
sun-peach-cnss-v8.dtsi
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@@ -209,7 +209,7 @@
cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition { cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition {
/* address-cells =3 size-cells=2 from sun-pcie.dtsi */ /* address-cells =3 size-cells=2 from sun-pcie.dtsi */
iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x88000000>, iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x18000000>,
<&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>; <&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>;
}; };
}; };

2
sun-peach-cnss.dtsi
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@@ -208,7 +208,7 @@
cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition { cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition {
/* address-cells =3 size-cells=2 from sun-pcie.dtsi */ /* address-cells =3 size-cells=2 from sun-pcie.dtsi */
iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x88000000>, iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x18000000>,
<&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>; <&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>;
}; };
}; };

17
volcano-qca6750.dts Normal file
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@@ -0,0 +1,17 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "volcano-qca6750.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Volcano SoC";
compatible = "qcom,volcano";
qcom,msm-id = <636 0x10000>, <640 0x10000>, <657 0x10000>, <658 0x10000>;
qcom,board-id = <0 0>;
};

127
volcano-qca6750.dtsi Normal file
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@@ -0,0 +1,127 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
&soc {
qcom,smp2p-wpss {
smp2p_wlan_1_in: qcom,smp2p-wlan-1-in {
qcom,entry-name = "wlan";
interrupt-controller;
#interrupt-cells = <2>;
};
smp2p_wlan_1_out: qcom,smp2p-wlan-1-out {
qcom,entry-name = "wlan";
#qcom,smem-state-cells = <1>;
};
smp2p_wlan_2_in: qcom,smp2p-wlan-2-in {
qcom,entry-name = "wlan_soc_wake";
interrupt-controller;
#interrupt-cells = <2>;
};
smp2p_wlan_2_out: qcom,smp2p-wlan-2-out {
qcom,entry-name = "wlan_soc_wake";
#qcom,smem-state-cells = <1>;
};
smp2p_wlan_3_out: qcom,smp2p-wlan-3-out {
qcom,entry-name = "wlan_ep_power_save";
#qcom,smem-state-cells = <1>;
};
};
icnss2: qcom,wcn6750 {
compatible = "qcom,wcn6750";
reg = <0x17110040 0x0>,
<0xc0000000 0x10000>;
reg-names = "msi_addr", "smmu_iova_ipa";
qcom,rproc-handle = <&wpss_pas>;
iommus = <&apps_smmu 0x1400 0x1>;
status = "disabled";
interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 771 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 773 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 774 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 775 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 776 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 777 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 778 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 779 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 780 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 781 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 782 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 783 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 784 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 785 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 786 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 787 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 788 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 789 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 790 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 791 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 792 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 793 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 794 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 795 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 796 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 797 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 799 IRQ_TYPE_EDGE_RISING>;
qcom,iommu-dma = "fastmap";
qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>;
qcom,iommu-geometry = <0xb0000000 0x10010000>;
dma-coherent;
qcom,fw-prefix;
qcom,wlan;
tsens = "sys-therm-4";
qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
vdd-cx-mx-supply = <&S3B>;
qcom,vdd-cx-mx-config = <968000 1040000 0 0 1>;
vdd-1.8-xo-supply = <&S1B>;
qcom,vdd-1.8-xo-config = <1856000 2040000 0 0 0>;
vdd-1.3-rfa-supply = <&S2B>;
qcom,vdd-1.3-rfa-config = <1256000 2050000 0 0 0>;
qcom,smem-states = <&smp2p_wlan_1_out 0>,
<&smp2p_wlan_2_out 0>,
<&smp2p_wlan_3_out 0>;
qcom,smem-state-names = "wlan-smp2p-out",
"wlan-soc-wake-smp2p-out",
"wlan-ep-powersave-smp2p-out";
qcom,qmp = <&aoss_qmp>;
qcom,vreg_ol_cpr ="s3b";
icnss_cdev_apss: qcom,icnss_cdev1 {
#cooling-cells = <2>;
};
icnss_cdev_wpss: qcom,icnss_cdev2 {
#cooling-cells = <2>;
};
qcom,smp2p_map_wlan_1_in {
interrupts-extended = <&smp2p_wlan_1_in 0 0>,
<&smp2p_wlan_1_in 1 0>;
interrupt-names = "qcom,smp2p-force-fatal-error",
"qcom,smp2p-early-crash-ind";
};
qcom,smp2p_map_wlan_2_in {
interrupts-extended = <&smp2p_wlan_2_in 0 0>;
interrupt-names = "qcom,smp2p-soc-wake-ack";
};
};
};

19
volcano6i-peach-cnss.dts Normal file
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@@ -0,0 +1,19 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "volcano6i-peach-cnss.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Volcano6I IOT SOC + Ganges/Brahma";
compatible = "qcom,volcano-idp", "qcom,volcano", "qcom,volcanop-idp",
"qcom,volcanop", "qcom,idp", "qcom,volcano-mtp",
"qcom,volcanop-mtp", "qcom,mtp";
qcom,msm-id = <657 0x10000>, <658 0x10000>;
qcom,board-id = <8 2>, <8 3>, <8 4>, <8 5>, <8 6>, <34 2>, <34 3>;
};

192
volcano6i-peach-cnss.dtsi Normal file
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@@ -0,0 +1,192 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/interconnect/qcom,volcano.h>
&tlmm {
cnss_pins {
cnss_wlan_en_active: cnss_wlan_en_active {
mux {
pins = "gpio44";
function = "gpio";
};
config {
pins = "gpio44";
drive-strength = <16>;
output-high;
bias-pull-up;
};
};
cnss_wlan_en_sleep: cnss_wlan_en_sleep {
mux {
pins = "gpio44";
function = "gpio";
};
config {
pins = "gpio44";
drive-strength = <2>;
output-low;
bias-pull-down;
};
};
cnss_wlan_sw_ctrl: cnss_wlan_sw_ctrl {
mux {
pins = "gpio45";
function = "wcn_sw_ctrl";
};
};
cnss_wlan_sw_ctrl_wl_cx: cnss_wlan_sw_ctrl_wl_cx {
mux {
pins = "gpio52";
function = "wcn_sw";
};
};
};
};
&reserved_memory {
cnss_wlan_mem: cnss_wlan_region {
compatible = "shared-dma-pool";
alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
reusable;
alignment = <0x0 0x400000>;
size = <0x0 0x2000000>;
};
};
&soc {
wlan_peach: qcom,cnss-peach@b0000000 {
compatible = "qcom,cnss-peach";
reg = <0xb0000000 0x10000>;
reg-names = "smmu_iova_ipa";
qcom,wlan-sw-ctrl-gpio = <&tlmm 52 0>;
supported-ids = <0x110E>;
wlan-en-gpio = <&tlmm 44 0>;
qcom,sw-ctrl-gpio = <&tlmm 45 0>;
/* List of GPIOs to be setup for interrupt wakeup capable */
mpm_wake_set_gpios = <45 52>;
pinctrl-names = "wlan_en_active", "wlan_en_sleep", "sw_ctrl",
"sw_ctrl_wl_cx";
pinctrl-0 = <&cnss_wlan_en_active>;
pinctrl-1 = <&cnss_wlan_en_sleep>;
pinctrl-2 = <&cnss_wlan_sw_ctrl>;
pinctrl-3 = <&cnss_wlan_sw_ctrl_wl_cx>;
qcom,wlan;
qcom,wlan-rc-num = <0>;
qcom,wlan-ramdump-dynamic = <0x780000>;
cnss-enable-self-recovery;
qcom,wlan-cbc-enabled;
use-pm-domain;
qcom,same-dt-multi-dev;
/* For AOP communication, use direct QMP instead of mailbox */
qcom,qmp = <&aoss_qmp>;
vdd-wlan-io-supply = <&L1B>;
qcom,vdd-wlan-io-config = <1800000 1800000 0 0 1>;
vdd-wlan-io12-supply = <&L5B>;
qcom,vdd-wlan-io12-config = <1200000 1200000 0 0 1>;
vdd-wlan-aon-supply = <&S1K>;
qcom,vdd-wlan-aon-config = <876000 1004000 0 0 1>;
vdd-wlan-dig-supply = <&S1L>;
qcom,vdd-wlan-dig-config = <876000 1000000 0 0 1>;
vdd-wlan-rfa1-supply = <&S1B>;
qcom,vdd-wlan-rfa1-config = <1860000 2000000 0 0 1>;
vdd-wlan-rfa2-supply = <&S2B>;
qcom,vdd-wlan-rfa2-config = <1312000 1340000 0 0 1>;
vdd-wlan-ant-share-supply = <&L18B>;
qcom,vdd-wlan-ant-share-config = <2800000 2800000 0 0 1>;
interconnects =
<&pcie_anoc MASTER_PCIE_0 &pcie_anoc SLAVE_ANOC_PCIE_GEM_NOC>,
<&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>;
interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";
qcom,icc-path-count = <2>;
qcom,bus-bw-cfg-count = <9>;
qcom,bus-bw-cfg =
/** ICC Path 1 **/
<0 0>, /* no vote */
/* idle: 0-18 Mbps snoc/anoc: 100 Mhz */
<2250 800000>,
/* low: 18-60 Mbps snoc/anoc: 100 Mhz */
<7500 800000>,
/* medium: 60-240 Mbps snoc/anoc: 100 Mhz */
<30000 800000>,
/* high: 240-1200 Mbps snoc/anoc: 100 Mhz */
<100000 800000>,
/* very high: > 1200 Mbps snoc/anoc: 403 Mhz */
<175000 3224000>,
/* ultra high: DBS mode snoc/anoc: 403 Mhz */
<312500 3224000>,
/* super high: DBS mode snoc/anoc: 533 Mhz */
<587500 4264000>,
/* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */
<7500 1600000>,
/** ICC Path 2 **/
<0 0>,
/* idle: 0-18 Mbps ddr: 547.2 MHz */
<2250 2188800>,
/* low: 18-60 Mbps ddr: 547.2 MHz */
<7500 2188800>,
/* medium: 60-240 Mbps ddr: 547.2 MHz */
<30000 2188800>,
/* high: 240-1200 Mbps ddr: 547.2 MHz */
<100000 2188800>,
/* very high: > 1200 Mbps ddr: 1555 MHz */
<175000 6220800>,
/* ultra high: DBS mode ddr: 2092 MHz */
<312500 8368000>,
/* super high: DBS mode ddr: 3.2 GHz */
<587500 12800000>,
/* low (latency critical): 18-60 Mbps ddr: 547.2 MHz */
<7500 2188800>;
qcom,pdc_init_table =
"{class: wlan_pdc, ss: rf, res: s2b.v, dwnval: 1244}",
"{class: wlan_pdc, ss: rf, res: s3b.v, enable: 0}",
"{class: wlan_pdc, ss: rf, res: l5b.m, enable: 1}",
"{class: wlan_pdc, ss: rf, res: g1f.e, enable: 0}",
"{class: wlan_pdc, ss: rf, res: l1b.m, enable: 1}",
"{class: wlan_pdc, ss: rf, res: s3b.m, enable: 0}",
"{class: wlan_pdc, ss: bb, res: pdc, enable: 1}";
};
};
&wpss_pas {
status = "disabled";
};
&pcie0_rp {
#address-cells = <5>;
#size-cells = <0>;
cnss_pci0: cnss_pci0 {
reg = <0 0 0 0 0>;
qcom,iommu-group = <&cnss_pci_iommu_group0>;
memory-region = <&cnss_wlan_mem>;
#address-cells = <1>;
#size-cells = <1>;
cnss_pci_iommu_group0: cnss_pci_iommu_group0 {
qcom,iommu-msi-size = <0x1000>;
qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
qcom,iommu-geometry = <0xa0000000 0x10010000>;
qcom,iommu-dma = "fastmap";
qcom,iommu-pagetable = "coherent";
qcom,iommu-faults = "stall-disable", "HUPCF",
"non-fatal";
};
};
};