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ARM: dts: msm: Add support for dummy clocks/GDSCs for tuna

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Add the dummy clock & gdsc handles for clients to be able to request
on them for tuna platform.

Change-Id: I6afb889a443b6e34ba94cbaff26bec43a85f6b88
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
This commit is contained in:
Anaadi Mishra
2024-03-27 12:43:47 +05:30
parent 110112040c
commit 1429d7994e
2 changed files with 461 additions and 0 deletions
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235
qcom/tuna-gdsc.dtsi Normal file
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// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&soc {
/* CAM_CC GDSCs */
cam_cc_ipe_0_gdsc: qcom,gdsc@adf017c {
compatible = "qcom,gdsc";
reg = <0xadf017c 0x4>;
regulator-name = "cam_cc_ipe_0_gdsc";
parent-supply = <&cam_cc_titan_top_gdsc>;
qcom,retain-regs;
qcom,support-hw-trigger;
qcom,support-cfg-gdscr;
status = "disabled";
};
cam_cc_ofe_gdsc: qcom,gdsc@adf00c8 {
compatible = "qcom,gdsc";
reg = <0xadf00c8 0x4>;
regulator-name = "cam_cc_ofe_gdsc";
parent-supply = <&cam_cc_titan_top_gdsc>;
qcom,retain-regs;
qcom,support-hw-trigger;
qcom,support-cfg-gdscr;
status = "disabled";
};
cam_cc_tfe_0_gdsc: qcom,gdsc@adf1004 {
compatible = "qcom,gdsc";
reg = <0xadf1004 0x4>;
regulator-name = "cam_cc_tfe_0_gdsc";
parent-supply = <&cam_cc_titan_top_gdsc>;
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
cam_cc_tfe_1_gdsc: qcom,gdsc@adf1084 {
compatible = "qcom,gdsc";
reg = <0xadf1084 0x4>;
regulator-name = "cam_cc_tfe_1_gdsc";
parent-supply = <&cam_cc_titan_top_gdsc>;
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
cam_cc_tfe_2_gdsc: qcom,gdsc@adf10ec {
compatible = "qcom,gdsc";
reg = <0xadf10ec 0x4>;
regulator-name = "cam_cc_tfe_2_gdsc";
parent-supply = <&cam_cc_titan_top_gdsc>;
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
cam_cc_titan_top_gdsc: qcom,gdsc@adf134c {
compatible = "qcom,gdsc";
reg = <0xadf134c 0x4>;
regulator-name = "cam_cc_titan_top_gdsc";
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
/* DISP_CC GDSCs */
disp_cc_mdss_core_gdsc: qcom,gdsc@af09000 {
compatible = "qcom,gdsc";
reg = <0xaf09000 0x4>;
regulator-name = "disp_cc_mdss_core_gdsc";
proxy-supply = <&disp_cc_mdss_core_gdsc>;
qcom,proxy-consumer-enable;
qcom,retain-regs;
qcom,support-hw-trigger;
qcom,support-cfg-gdscr;
status = "disabled";
};
disp_cc_mdss_core_int2_gdsc: qcom,gdsc@af0b000 {
compatible = "qcom,gdsc";
reg = <0xaf0b000 0x4>;
regulator-name = "disp_cc_mdss_core_int2_gdsc";
qcom,retain-regs;
qcom,support-hw-trigger;
qcom,support-cfg-gdscr;
status = "disabled";
};
/* EVA_CC GDSCs */
eva_cc_mvs0_gdsc: qcom,gdsc@abf8068 {
compatible = "qcom,gdsc";
reg = <0xabf8068 0x4>;
regulator-name = "eva_cc_mvs0_gdsc";
parent-supply = <&eva_cc_mvs0c_gdsc>;
qcom,retain-regs;
qcom,support-hw-trigger;
qcom,support-cfg-gdscr;
status = "disabled";
};
eva_cc_mvs0c_gdsc: qcom,gdsc@abf8034 {
compatible = "qcom,gdsc";
reg = <0xabf8034 0x4>;
regulator-name = "eva_cc_mvs0c_gdsc";
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
gcc_apcs_gdsc_vote_ctrl: syscon@15214c {
compatible = "syscon";
reg = <0x15214c 0x4>;
};
/* GCC GDSCs */
gcc_pcie_0_gdsc: qcom,gdsc@16b004 {
compatible = "qcom,gdsc";
reg = <0x16b004 0x4>;
regulator-name = "gcc_pcie_0_gdsc";
qcom,retain-regs;
qcom,no-status-check-on-disable;
qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 0>;
qcom,support-cfg-gdscr;
status = "disabled";
};
gcc_pcie_0_phy_gdsc: qcom,gdsc@16c000 {
compatible = "qcom,gdsc";
reg = <0x16c000 0x4>;
regulator-name = "gcc_pcie_0_phy_gdsc";
qcom,retain-regs;
qcom,no-status-check-on-disable;
qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 2>;
qcom,support-cfg-gdscr;
status = "disabled";
};
gcc_ufs_mem_phy_gdsc: qcom,gdsc@19e000 {
compatible = "qcom,gdsc";
reg = <0x19e000 0x4>;
regulator-name = "gcc_ufs_mem_phy_gdsc";
proxy-supply = <&gcc_ufs_mem_phy_gdsc>;
qcom,proxy-consumer-enable;
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
gcc_ufs_phy_gdsc: qcom,gdsc@177004 {
compatible = "qcom,gdsc";
reg = <0x177004 0x4>;
regulator-name = "gcc_ufs_phy_gdsc";
proxy-supply = <&gcc_ufs_phy_gdsc>;
qcom,proxy-consumer-enable;
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
gcc_usb30_prim_gdsc: qcom,gdsc@139004 {
compatible = "qcom,gdsc";
reg = <0x139004 0x4>;
regulator-name = "gcc_usb30_prim_gdsc";
proxy-supply = <&gcc_usb30_prim_gdsc>;
qcom,proxy-consumer-enable;
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
gcc_usb3_phy_gdsc: qcom,gdsc@150018 {
compatible = "qcom,gdsc";
reg = <0x150018 0x4>;
regulator-name = "gcc_usb3_phy_gdsc";
proxy-supply = <&gcc_usb3_phy_gdsc>;
qcom,proxy-consumer-enable;
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
/* GPU_CC GDSCs */
gpu_cc_cx_gdsc_hw_ctrl: syscon@3d99094 {
compatible = "syscon";
reg = <0x3d99094 0x4>;
};
gpu_cc_cx_gdsc: qcom,gdsc@3d99080 {
compatible = "qcom,gdsc";
reg = <0x3d99080 0x4>;
regulator-name = "gpu_cc_cx_gdsc";
hw-ctrl-addr = <&gpu_cc_cx_gdsc_hw_ctrl>;
proxy-supply = <&gpu_cc_cx_gdsc>;
qcom,proxy-consumer-enable;
qcom,retain-regs;
qcom,support-cfg-gdscr;
qcom,no-status-check-on-disable;
status = "disabled";
};
/* GX_CLKCTL GDSCs */
gx_clkctl_gx_gdsc: qcom,gdsc@3d68024 {
compatible = "qcom,gdsc";
reg = <0x3d68024 0x4>;
regulator-name = "gx_clkctl_gx_gdsc";
reg-supply = <&gpu_cc_cx_gdsc>;
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
/* VIDEO_CC GDSCs */
video_cc_mvs0_gdsc: qcom,gdsc@aaf808c {
compatible = "qcom,gdsc";
reg = <0xaaf808c 0x4>;
regulator-name = "video_cc_mvs0_gdsc";
parent-supply = <&video_cc_mvs0c_gdsc>;
qcom,retain-regs;
qcom,support-hw-trigger;
qcom,support-cfg-gdscr;
status = "disabled";
};
video_cc_mvs0c_gdsc: qcom,gdsc@aaf8034 {
compatible = "qcom,gdsc";
reg = <0xaaf8034 0x4>;
regulator-name = "video_cc_mvs0c_gdsc";
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
};