From cd493ef9c889961575304dc85fa2ca244b65ddc8 Mon Sep 17 00:00:00 2001
From: Gerrit SelfHelp Service Account <gerritshsvc@localhost>
Date: Mon, 19 Feb 2024 23:08:05 -0800
Subject: [PATCH 01/27] Initial empty repository


From 5a99ac82db7ebe6caf0a5de942f1ab2d9c99b081 Mon Sep 17 00:00:00 2001
From: Khageswararao Rao B <quic_kraob@quicinc.com>
Date: Wed, 21 Feb 2024 20:21:10 +0530
Subject: [PATCH 02/27] nfc: dts: Add device tree entries for sun target

Add initial device tree entries for sun target

Change-Id: Ieeb7eb1f6e300b1453cda59f75f50b9de2b58c6c
---
 Kbuild                     | 18 +++++++++++
 Makefile                   | 12 +++++++
 nxp/sun-nfc-cdp.dts        | 17 ++++++++++
 nxp/sun-nfc-common.dtsi    | 26 +++++++++++++++
 nxp/sun-nfc-mtp.dts        | 17 ++++++++++
 nxp/sun-nfc-pinctrl.dtsi   | 66 ++++++++++++++++++++++++++++++++++++++
 nxp/sun-nfc.dts            | 15 +++++++++
 st/sun-nfc-atp.dts         | 17 ++++++++++
 st/sun-nfc-cdp.dts         | 16 +++++++++
 st/sun-nfc-common.dtsi     | 29 +++++++++++++++++
 st/sun-nfc-mtp.dts         | 16 +++++++++
 st/sun-nfc-pinctrl.dtsi    | 66 ++++++++++++++++++++++++++++++++++++++
 st/sun-nfc-qrd-sku1-v8.dts | 16 +++++++++
 st/sun-nfc-qrd-sku1.dts    | 16 +++++++++
 st/sun-nfc-qrd-sku2-v8.dts | 16 +++++++++
 st/sun-nfc-rcm.dts         | 16 +++++++++
 st/sun-nfc.dts             | 16 +++++++++
 17 files changed, 395 insertions(+)
 create mode 100644 Kbuild
 create mode 100644 Makefile
 create mode 100644 nxp/sun-nfc-cdp.dts
 create mode 100644 nxp/sun-nfc-common.dtsi
 create mode 100644 nxp/sun-nfc-mtp.dts
 create mode 100644 nxp/sun-nfc-pinctrl.dtsi
 create mode 100644 nxp/sun-nfc.dts
 create mode 100644 st/sun-nfc-atp.dts
 create mode 100644 st/sun-nfc-cdp.dts
 create mode 100644 st/sun-nfc-common.dtsi
 create mode 100644 st/sun-nfc-mtp.dts
 create mode 100644 st/sun-nfc-pinctrl.dtsi
 create mode 100644 st/sun-nfc-qrd-sku1-v8.dts
 create mode 100644 st/sun-nfc-qrd-sku1.dts
 create mode 100644 st/sun-nfc-qrd-sku2-v8.dts
 create mode 100644 st/sun-nfc-rcm.dts
 create mode 100644 st/sun-nfc.dts

diff --git a/Kbuild b/Kbuild
new file mode 100644
index 00000000..30c9ad8e
--- /dev/null
+++ b/Kbuild
@@ -0,0 +1,18 @@
+ifeq ($(CONFIG_ARCH_SUN),y)
+dtbo-y += nxp/sun-nfc.dtbo \
+          nxp/sun-nfc-cdp.dtbo \
+          nxp/sun-nfc-mtp.dtbo \
+
+dtbo-y += st/sun-nfc.dtbo \
+          st/sun-nfc-mtp.dtbo \
+          st/sun-nfc-cdp.dtbo \
+          st/sun-nfc-qrd-sku1.dtbo \
+          st/sun-nfc-qrd-sku1-v8.dtbo \
+          st/sun-nfc-qrd-sku2-v8.dtbo \
+          st/sun-nfc-atp.dtbo \
+          st/sun-nfc-rcm.dtbo
+endif
+
+always-y        := $(dtb-y) $(dtbo-y)
+subdir-y        := $(dts-dirs)
+clean-files     := *.dtb *.dtbo
diff --git a/Makefile b/Makefile
new file mode 100644
index 00000000..f2d100f2
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,12 @@
+KBUILD_OPTIONS += KBUILD_EXTMOD_DTS=.
+
+all: dtbs
+
+%:
+	$(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS)
+
+modules_install:
+	$(MAKE) M=$(M) -C $(KERNEL_SRC) modules_install
+
+clean:
+	$(MAKE) -C $(KERNEL_SRC) M=$(M) clean
\ No newline at end of file
diff --git a/nxp/sun-nfc-cdp.dts b/nxp/sun-nfc-cdp.dts
new file mode 100644
index 00000000..3a93ef7f
--- /dev/null
+++ b/nxp/sun-nfc-cdp.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-common.dtsi"
+
+/ {
+        model = "Qualcomm Technologies, Inc. Sun CDP";
+        compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp";
+        qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+        qcom,board-id = <0x40001 0>;
+};
diff --git a/nxp/sun-nfc-common.dtsi b/nxp/sun-nfc-common.dtsi
new file mode 100644
index 00000000..2ba69808
--- /dev/null
+++ b/nxp/sun-nfc-common.dtsi
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&qupv3_se0_i2c {
+	status = "ok";
+	qcom,clk-freq-out = <1000000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	nq@28 {
+		compatible = "qcom,sn-nci";
+		reg = <0x28>;
+		qcom,sn-irq = <&tlmm 75 0x00>;
+		qcom,sn-ven = <&tlmm 34 0x00>;
+		qcom,sn-clkreq = <&tlmm 35 0x00>;
+		qcom,sn-szone = "enable";
+		interrupt-parent = <&tlmm>;
+		interrupts = <75 0>;
+		interrupt-names = "nfc_irq";
+		pinctrl-names = "nfc_active", "nfc_suspend";
+		pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
+		pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
+	};
+};
diff --git a/nxp/sun-nfc-mtp.dts b/nxp/sun-nfc-mtp.dts
new file mode 100644
index 00000000..2af0da47
--- /dev/null
+++ b/nxp/sun-nfc-mtp.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-common.dtsi"
+
+/ {
+        model = "Qualcomm Technologies, Inc. Sun MTP";
+        compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
+        qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+        qcom,board-id = <0x30008 0>;
+};
diff --git a/nxp/sun-nfc-pinctrl.dtsi b/nxp/sun-nfc-pinctrl.dtsi
new file mode 100644
index 00000000..9f17d1c3
--- /dev/null
+++ b/nxp/sun-nfc-pinctrl.dtsi
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&tlmm {
+	nfc {
+		nfc_int_active: nfc_int_active {
+			/* active state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio75";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio75";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_int_suspend: nfc_int_suspend {
+			/* sleep state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio75";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio75";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_enable_active: nfc_enable_active {
+			mux {
+				/* Enable, and Clock request gpios */
+				pins = "gpio34", "gpio35";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio34", "gpio35";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+
+		nfc_enable_suspend: nfc_enable_suspend {
+			mux {
+				pins = "gpio34", "gpio35";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio34", "gpio35";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+	}; //nfc
+}; //tlmm
diff --git a/nxp/sun-nfc.dts b/nxp/sun-nfc.dts
new file mode 100644
index 00000000..5daec909
--- /dev/null
+++ b/nxp/sun-nfc.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-pinctrl.dtsi"
+/ {
+        model = "Qualcomm Technologies, Inc. Sun SoC";
+        compatible = "qcom,sun";
+        qcom,board-id = <0 0>;
+};
diff --git a/st/sun-nfc-atp.dts b/st/sun-nfc-atp.dts
new file mode 100644
index 00000000..3226e9ca
--- /dev/null
+++ b/st/sun-nfc-atp.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-common.dtsi"
+/ {
+	model = "Qualcomm Technologies, Inc. Sun ATP";
+	compatible = "qcom,sun-atp", "qcom,sun", "qcom,sunp-atp", "qcom,sunp",
+			   "qcom,atp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>;
+	qcom,board-id = <0x10021 0>;
+};
diff --git a/st/sun-nfc-cdp.dts b/st/sun-nfc-cdp.dts
new file mode 100644
index 00000000..e138c38b
--- /dev/null
+++ b/st/sun-nfc-cdp.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-common.dtsi"
+/ {
+	model = "Qualcomm Technologies, Inc. Sun CDP";
+	compatible = "qcom, sun-cdp", "qcom,sun", "qcom,cdp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+	qcom,board-id = <0x1 0>, <0x20001 0>, <0x50001 0>;
+};
diff --git a/st/sun-nfc-common.dtsi b/st/sun-nfc-common.dtsi
new file mode 100644
index 00000000..096c930b
--- /dev/null
+++ b/st/sun-nfc-common.dtsi
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+
+#include <dt-bindings/clock/qcom,rpmh.h>
+&qupv3_se0_i2c {
+        status = "ok";
+        qcom,clk-freq-out = <1000000>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        st21nfc: st21nfc@08 {
+                compatible = "st,st21nfc";
+                reg = <0x08>;
+                irq-gpios = <&tlmm 75 0x00>;
+                reset-gpios = <&tlmm 34 0x00>;
+                clkreq-gpios = <&tlmm 35 0x00>;
+                interrupt-parent = <&tlmm>;
+                interrupts = <75 0>;
+                interrupt-names = "nfc_irq";
+                pinctrl-names = "nfc_active", "nfc_suspend";
+                pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
+                pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
+                clocks = <&rpmhcc RPMH_RF_CLK3>;
+		clock-names = "nfc_ref_clk";
+        };
+};
diff --git a/st/sun-nfc-mtp.dts b/st/sun-nfc-mtp.dts
new file mode 100644
index 00000000..f8196483
--- /dev/null
+++ b/st/sun-nfc-mtp.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-common.dtsi"
+/ {
+	model = "Qualcomm Technologies, Inc. Sun MTP";
+	compatible = "qcom, sun-mtp", "qcom,sun", "qcom,mtp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+	qcom,board-id = <0x8 0>, <0x20008 0>, <0x40008 0>;
+};
diff --git a/st/sun-nfc-pinctrl.dtsi b/st/sun-nfc-pinctrl.dtsi
new file mode 100644
index 00000000..1c69223f
--- /dev/null
+++ b/st/sun-nfc-pinctrl.dtsi
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&tlmm {
+	nfc {
+		nfc_int_active: nfc_int_active {
+			/* active state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio75";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio75";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_int_suspend: nfc_int_suspend {
+			/* sleep state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio75";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio75";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_enable_active: nfc_enable_active {
+			mux {
+				/* Enable and Clock request gpios */
+				pins = "gpio34", "gpio35";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio34", "gpio35";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+
+		nfc_enable_suspend: nfc_enable_suspend {
+			mux {
+				pins = "gpio34", "gpio35";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio34", "gpio35";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+	}; //nfc
+}; //tlmm
diff --git a/st/sun-nfc-qrd-sku1-v8.dts b/st/sun-nfc-qrd-sku1-v8.dts
new file mode 100644
index 00000000..b0bc48df
--- /dev/null
+++ b/st/sun-nfc-qrd-sku1-v8.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-common.dtsi"
+/ {
+        model = "Qualcomm Technologies, Inc. Sun QRD SKU1 V8 Power Grid";
+        compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp","qcom,qrd";
+        qcom,msm-id = <618 0x10000>, <618 0x20000>;
+        qcom,board-id = <0x3000B 0>;
+};
diff --git a/st/sun-nfc-qrd-sku1.dts b/st/sun-nfc-qrd-sku1.dts
new file mode 100644
index 00000000..f19198e3
--- /dev/null
+++ b/st/sun-nfc-qrd-sku1.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-common.dtsi"
+/ {
+	model = "Qualcomm Technologies, Inc. Sun QRD SKU1";
+	compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp", "qcom,qrd";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>;
+	qcom,board-id = <0x1000B 0>;
+};
diff --git a/st/sun-nfc-qrd-sku2-v8.dts b/st/sun-nfc-qrd-sku2-v8.dts
new file mode 100644
index 00000000..1b14a5ec
--- /dev/null
+++ b/st/sun-nfc-qrd-sku2-v8.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-common.dtsi"
+/ {
+        model = "Qualcomm Technologies, Inc. Sun QRD SKU2 V8 Power Grid";
+        compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp","qcom,qrd";
+        qcom,msm-id = <618 0x10000>, <618 0x20000>;
+        qcom,board-id = <0x2000B 0>;
+};
diff --git a/st/sun-nfc-rcm.dts b/st/sun-nfc-rcm.dts
new file mode 100644
index 00000000..5bc5d3ec
--- /dev/null
+++ b/st/sun-nfc-rcm.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-common.dtsi"
+/ {
+        model = "Qualcomm Technologies, Inc. Sun RCM";
+	compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp", "qcom,rcm";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>;
+	qcom,board-id = <0x15 0>;
+};
diff --git a/st/sun-nfc.dts b/st/sun-nfc.dts
new file mode 100644
index 00000000..246b0014
--- /dev/null
+++ b/st/sun-nfc.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-pinctrl.dtsi"
+/ {
+	model = "Qualcomm Technologies, Inc. Sun";
+	compatible = "qcom,sun";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+	qcom,board-id = <0 0>;
+};

From 9f7687e87b2a3642617b36e22e8a9e5273c0b3ff Mon Sep 17 00:00:00 2001
From: Khageswararao Rao B <quic_kraob@quicinc.com>
Date: Wed, 28 Feb 2024 01:44:09 +0530
Subject: [PATCH 03/27] nfc dts: New board id update for sun mtp.

Updated new board id for sun mtp.

Change-Id: I78a3d7bd6f0c5386ddc0bcdcad69694727fd3b8a
---
 st/sun-nfc-mtp.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/st/sun-nfc-mtp.dts b/st/sun-nfc-mtp.dts
index f8196483..b0f68a6b 100644
--- a/st/sun-nfc-mtp.dts
+++ b/st/sun-nfc-mtp.dts
@@ -12,5 +12,5 @@
 	model = "Qualcomm Technologies, Inc. Sun MTP";
 	compatible = "qcom, sun-mtp", "qcom,sun", "qcom,mtp";
 	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
-	qcom,board-id = <0x8 0>, <0x20008 0>, <0x40008 0>;
+	qcom,board-id = <0x8 0>, <0x20008 0>, <0x40008 0>, <0x50008 0>;
 };

From 1557ec6d87e9c361b87faa03cc34609a46ce7522 Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Wed, 6 Mar 2024 16:28:22 +0530
Subject: [PATCH 04/27] [NFC]: Revert temporary clock changes

reverted previously added clock changes
commit 15a07138e8a6f9194d2a4e07a5a096882d73ee6b

Change-Id: I61e02526d1b10b6a89877eb6ca4ece4dfa54354e
---
 st/sun-nfc-common.dtsi | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/st/sun-nfc-common.dtsi b/st/sun-nfc-common.dtsi
index 096c930b..02a066e5 100644
--- a/st/sun-nfc-common.dtsi
+++ b/st/sun-nfc-common.dtsi
@@ -5,7 +5,6 @@
  */
 
 
-#include <dt-bindings/clock/qcom,rpmh.h>
 &qupv3_se0_i2c {
         status = "ok";
         qcom,clk-freq-out = <1000000>;
@@ -23,7 +22,5 @@
                 pinctrl-names = "nfc_active", "nfc_suspend";
                 pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
                 pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
-                clocks = <&rpmhcc RPMH_RF_CLK3>;
-		clock-names = "nfc_ref_clk";
         };
 };

From e76c101fa5613da0a4b5907cc91c1e0f1f6e1917 Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Tue, 2 Apr 2024 11:23:51 +0530
Subject: [PATCH 05/27] [NFC]: Add Soc info to support sun target.

- Added Soc info to support sun target.

Change-Id: I279685e79059b338f089f0d8183c3bd3cd977a52
---
 nxp/sun-nfc.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/nxp/sun-nfc.dts b/nxp/sun-nfc.dts
index 5daec909..71915971 100644
--- a/nxp/sun-nfc.dts
+++ b/nxp/sun-nfc.dts
@@ -11,5 +11,6 @@
 / {
         model = "Qualcomm Technologies, Inc. Sun SoC";
         compatible = "qcom,sun";
+        qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
         qcom,board-id = <0 0>;
 };

From fccf69cfa101c9b37fef9f51c6cd1f229f2341c3 Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Mon, 8 Apr 2024 10:13:36 +0530
Subject: [PATCH 06/27] [NFC][ARM]: new MSM-ID to support for different
 packagings

Add new MSM-ID for SUN target

Change-Id: If0a014d98008e64678d62c4a4a171fdaf69a5a41
---
 nxp/sun-nfc-cdp.dts        | 4 +++-
 nxp/sun-nfc-mtp.dts        | 4 +++-
 st/sun-nfc-atp.dts         | 3 ++-
 st/sun-nfc-cdp.dts         | 4 +++-
 st/sun-nfc-mtp.dts         | 4 +++-
 st/sun-nfc-qrd-sku1-v8.dts | 3 ++-
 st/sun-nfc-qrd-sku1.dts    | 3 ++-
 st/sun-nfc-qrd-sku2-v8.dts | 3 ++-
 st/sun-nfc-rcm.dts         | 3 ++-
 st/sun-nfc.dts             | 4 +++-
 10 files changed, 25 insertions(+), 10 deletions(-)

diff --git a/nxp/sun-nfc-cdp.dts b/nxp/sun-nfc-cdp.dts
index 3a93ef7f..62d78a3c 100644
--- a/nxp/sun-nfc-cdp.dts
+++ b/nxp/sun-nfc-cdp.dts
@@ -12,6 +12,8 @@
 / {
         model = "Qualcomm Technologies, Inc. Sun CDP";
         compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp";
-        qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+        qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
         qcom,board-id = <0x40001 0>;
 };
diff --git a/nxp/sun-nfc-mtp.dts b/nxp/sun-nfc-mtp.dts
index 2af0da47..4f0abc24 100644
--- a/nxp/sun-nfc-mtp.dts
+++ b/nxp/sun-nfc-mtp.dts
@@ -12,6 +12,8 @@
 / {
         model = "Qualcomm Technologies, Inc. Sun MTP";
         compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
-        qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+        qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
         qcom,board-id = <0x30008 0>;
 };
diff --git a/st/sun-nfc-atp.dts b/st/sun-nfc-atp.dts
index 3226e9ca..1665e712 100644
--- a/st/sun-nfc-atp.dts
+++ b/st/sun-nfc-atp.dts
@@ -12,6 +12,7 @@
 	model = "Qualcomm Technologies, Inc. Sun ATP";
 	compatible = "qcom,sun-atp", "qcom,sun", "qcom,sunp-atp", "qcom,sunp",
 			   "qcom,atp";
-	qcom,msm-id = <618 0x10000>, <618 0x20000>;
+	qcom,msm-id = <618 0x10000>, <618 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>;
 	qcom,board-id = <0x10021 0>;
 };
diff --git a/st/sun-nfc-cdp.dts b/st/sun-nfc-cdp.dts
index e138c38b..16e36c9c 100644
--- a/st/sun-nfc-cdp.dts
+++ b/st/sun-nfc-cdp.dts
@@ -11,6 +11,8 @@
 / {
 	model = "Qualcomm Technologies, Inc. Sun CDP";
 	compatible = "qcom, sun-cdp", "qcom,sun", "qcom,cdp";
-	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
 	qcom,board-id = <0x1 0>, <0x20001 0>, <0x50001 0>;
 };
diff --git a/st/sun-nfc-mtp.dts b/st/sun-nfc-mtp.dts
index b0f68a6b..f8a9d90d 100644
--- a/st/sun-nfc-mtp.dts
+++ b/st/sun-nfc-mtp.dts
@@ -11,6 +11,8 @@
 / {
 	model = "Qualcomm Technologies, Inc. Sun MTP";
 	compatible = "qcom, sun-mtp", "qcom,sun", "qcom,mtp";
-	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
 	qcom,board-id = <0x8 0>, <0x20008 0>, <0x40008 0>, <0x50008 0>;
 };
diff --git a/st/sun-nfc-qrd-sku1-v8.dts b/st/sun-nfc-qrd-sku1-v8.dts
index b0bc48df..4d0ac8a9 100644
--- a/st/sun-nfc-qrd-sku1-v8.dts
+++ b/st/sun-nfc-qrd-sku1-v8.dts
@@ -11,6 +11,7 @@
 / {
         model = "Qualcomm Technologies, Inc. Sun QRD SKU1 V8 Power Grid";
         compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp","qcom,qrd";
-        qcom,msm-id = <618 0x10000>, <618 0x20000>;
+        qcom,msm-id = <618 0x10000>, <618 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>;
         qcom,board-id = <0x3000B 0>;
 };
diff --git a/st/sun-nfc-qrd-sku1.dts b/st/sun-nfc-qrd-sku1.dts
index f19198e3..9975dc4c 100644
--- a/st/sun-nfc-qrd-sku1.dts
+++ b/st/sun-nfc-qrd-sku1.dts
@@ -11,6 +11,7 @@
 / {
 	model = "Qualcomm Technologies, Inc. Sun QRD SKU1";
 	compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp", "qcom,qrd";
-	qcom,msm-id = <618 0x10000>, <618 0x20000>;
+	qcom,msm-id = <618 0x10000>, <618 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>;
 	qcom,board-id = <0x1000B 0>;
 };
diff --git a/st/sun-nfc-qrd-sku2-v8.dts b/st/sun-nfc-qrd-sku2-v8.dts
index 1b14a5ec..8f8fe9a5 100644
--- a/st/sun-nfc-qrd-sku2-v8.dts
+++ b/st/sun-nfc-qrd-sku2-v8.dts
@@ -11,6 +11,7 @@
 / {
         model = "Qualcomm Technologies, Inc. Sun QRD SKU2 V8 Power Grid";
         compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp","qcom,qrd";
-        qcom,msm-id = <618 0x10000>, <618 0x20000>;
+        qcom,msm-id = <618 0x10000>, <618 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>;
         qcom,board-id = <0x2000B 0>;
 };
diff --git a/st/sun-nfc-rcm.dts b/st/sun-nfc-rcm.dts
index 5bc5d3ec..72053c83 100644
--- a/st/sun-nfc-rcm.dts
+++ b/st/sun-nfc-rcm.dts
@@ -11,6 +11,7 @@
 / {
         model = "Qualcomm Technologies, Inc. Sun RCM";
 	compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp", "qcom,rcm";
-	qcom,msm-id = <618 0x10000>, <618 0x20000>;
+	qcom,msm-id = <618 0x10000>, <618 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>;
 	qcom,board-id = <0x15 0>;
 };
diff --git a/st/sun-nfc.dts b/st/sun-nfc.dts
index 246b0014..9fd98552 100644
--- a/st/sun-nfc.dts
+++ b/st/sun-nfc.dts
@@ -11,6 +11,8 @@
 / {
 	model = "Qualcomm Technologies, Inc. Sun";
 	compatible = "qcom,sun";
-	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
 	qcom,board-id = <0 0>;
 };

From 9c4a64a2d07f1b2c115fafec3cd316759fc0cf80 Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Thu, 25 Apr 2024 09:15:30 +0530
Subject: [PATCH 07/27] [NFC][DT]: Add new MSM-ID to support SKU2 platform

- Added new MSM-ID to support SKU2 platform.

Change-Id: Ie42e179a5084f22277e9ed52e79179c948db2d3b
---
 st/sun-nfc-qrd-sku2-v8.dts | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/st/sun-nfc-qrd-sku2-v8.dts b/st/sun-nfc-qrd-sku2-v8.dts
index 8f8fe9a5..eee84f27 100644
--- a/st/sun-nfc-qrd-sku2-v8.dts
+++ b/st/sun-nfc-qrd-sku2-v8.dts
@@ -11,7 +11,8 @@
 / {
         model = "Qualcomm Technologies, Inc. Sun QRD SKU2 V8 Power Grid";
         compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp","qcom,qrd";
-        qcom,msm-id = <618 0x10000>, <618 0x20000>,
-		      <0x100026a 0x10000>, <0x100026a 0x20000>;
+        qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+                      <0x100027f 0x10000>, <0x100027f 0x20000>;
         qcom,board-id = <0x2000B 0>;
 };

From 24c5144faae98492c9e4018e47e2622403848489 Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Thu, 25 Apr 2024 10:23:24 +0530
Subject: [PATCH 08/27] Add NFC device Node for MTP_kiwi platform

- Added NFC device Node to support MTP_kiwi platform
- Updated new MSM-ID to SKU1 and SKU1_V8 platforms

Change-Id: Ieba5c1bcbd6de1bd29540566ccc3fd952ff84575
---
 Kbuild                     |  1 +
 st/sun-mtp-kiwi-v8.dts     | 18 ++++++++++++++++++
 st/sun-nfc-qrd-sku1-v8.dts |  2 +-
 st/sun-nfc-qrd-sku1.dts    |  2 +-
 4 files changed, 21 insertions(+), 2 deletions(-)
 create mode 100644 st/sun-mtp-kiwi-v8.dts

diff --git a/Kbuild b/Kbuild
index 30c9ad8e..0d856c20 100644
--- a/Kbuild
+++ b/Kbuild
@@ -10,6 +10,7 @@ dtbo-y += st/sun-nfc.dtbo \
           st/sun-nfc-qrd-sku1-v8.dtbo \
           st/sun-nfc-qrd-sku2-v8.dtbo \
           st/sun-nfc-atp.dtbo \
+          st/sun-mtp-kiwi-v8.dtbo \
           st/sun-nfc-rcm.dtbo
 endif
 
diff --git a/st/sun-mtp-kiwi-v8.dts b/st/sun-mtp-kiwi-v8.dts
new file mode 100644
index 00000000..ce72b368
--- /dev/null
+++ b/st/sun-mtp-kiwi-v8.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Sun MTP Kiwi WLAN V8 Power Grid";
+	compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp",
+			   "qcom,mtp";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
+	qcom,board-id = <0x50008 0>;
+};
+
diff --git a/st/sun-nfc-qrd-sku1-v8.dts b/st/sun-nfc-qrd-sku1-v8.dts
index 4d0ac8a9..6408dc86 100644
--- a/st/sun-nfc-qrd-sku1-v8.dts
+++ b/st/sun-nfc-qrd-sku1-v8.dts
@@ -11,7 +11,7 @@
 / {
         model = "Qualcomm Technologies, Inc. Sun QRD SKU1 V8 Power Grid";
         compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp","qcom,qrd";
-        qcom,msm-id = <618 0x10000>, <618 0x20000>,
+        qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
 		      <0x100026a 0x10000>, <0x100026a 0x20000>;
         qcom,board-id = <0x3000B 0>;
 };
diff --git a/st/sun-nfc-qrd-sku1.dts b/st/sun-nfc-qrd-sku1.dts
index 9975dc4c..b1252f14 100644
--- a/st/sun-nfc-qrd-sku1.dts
+++ b/st/sun-nfc-qrd-sku1.dts
@@ -11,7 +11,7 @@
 / {
 	model = "Qualcomm Technologies, Inc. Sun QRD SKU1";
 	compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp", "qcom,qrd";
-	qcom,msm-id = <618 0x10000>, <618 0x20000>,
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
 		      <0x100026a 0x10000>, <0x100026a 0x20000>;
 	qcom,board-id = <0x1000B 0>;
 };

From e84f4bd12f9fc6be1ff652cf5323647667e32abf Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Fri, 12 Apr 2024 17:02:09 +0530
Subject: [PATCH 09/27] ARM: dts: msm: Add NFC device node for parrot

Device node changes required on parrot,
describing the GPIO configuration for
Nfc controller chip.

Modified corresponding Nfc device node
for ATP, IDP & QRD platforms

Change-Id: I822edc9d0babbe6607897ae0fa8cd4146292bcd3
---
 Kbuild                      |  7 ++++
 nxp/parrot-nfc-atp.dts      | 17 ++++++++++
 nxp/parrot-nfc-common.dtsi  | 28 ++++++++++++++++
 nxp/parrot-nfc-idp.dts      | 17 ++++++++++
 nxp/parrot-nfc-pinctrl.dtsi | 66 +++++++++++++++++++++++++++++++++++++
 nxp/parrot-nfc-qrd.dts      | 18 ++++++++++
 nxp/parrot-nfc.dts          | 16 +++++++++
 7 files changed, 169 insertions(+)
 create mode 100644 nxp/parrot-nfc-atp.dts
 create mode 100644 nxp/parrot-nfc-common.dtsi
 create mode 100644 nxp/parrot-nfc-idp.dts
 create mode 100644 nxp/parrot-nfc-pinctrl.dtsi
 create mode 100644 nxp/parrot-nfc-qrd.dts
 create mode 100644 nxp/parrot-nfc.dts

diff --git a/Kbuild b/Kbuild
index 30c9ad8e..3efff8ae 100644
--- a/Kbuild
+++ b/Kbuild
@@ -13,6 +13,13 @@ dtbo-y += st/sun-nfc.dtbo \
           st/sun-nfc-rcm.dtbo
 endif
 
+ifeq ($(CONFIG_ARCH_PARROT),y)
+dtbo-y += nxp/parrot-nfc.dtbo \
+          nxp/parrot-nfc-qrd.dtbo \
+          nxp/parrot-nfc-idp.dtbo \
+          nxp/parrot-nfc-atp.dtbo
+endif
+
 always-y        := $(dtb-y) $(dtbo-y)
 subdir-y        := $(dts-dirs)
 clean-files     := *.dtb *.dtbo
diff --git a/nxp/parrot-nfc-atp.dts b/nxp/parrot-nfc-atp.dts
new file mode 100644
index 00000000..51ca0813
--- /dev/null
+++ b/nxp/parrot-nfc-atp.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-nfc-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot ATP";
+	compatible = "qcom,parrot-atp", "qcom,parrot", "qcom,atp";
+	qcom,msm-id = <663 0x10000>;
+	qcom,board-id = <33 0>;
+};
diff --git a/nxp/parrot-nfc-common.dtsi b/nxp/parrot-nfc-common.dtsi
new file mode 100644
index 00000000..5080a9f7
--- /dev/null
+++ b/nxp/parrot-nfc-common.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&qupv3_se6_i2c {
+	status = "ok";
+	qcom,clk-freq-out = <1000000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	nq@28 {
+		compatible = "qcom,sn-nci";
+		reg = <0x28>;
+		qcom,sn-irq = <&tlmm 9 0x00>;
+		qcom,sn-ven = <&tlmm 6 0x00>;
+		qcom,sn-clkreq = <&tlmm 7 0x00>;
+		qcom,sn-vdd-1p8-supply = <&L21B>;
+		qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
+		qcom,sn-vdd-1p8-current = <157000>;
+		interrupt-parent = <&tlmm>;
+		interrupts = <9 0>;
+		interrupt-names = "nfc_irq";
+		pinctrl-names = "nfc_active", "nfc_suspend";
+		pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
+		pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
+	};
+};
diff --git a/nxp/parrot-nfc-idp.dts b/nxp/parrot-nfc-idp.dts
new file mode 100644
index 00000000..dacd8178
--- /dev/null
+++ b/nxp/parrot-nfc-idp.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-nfc-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot IDP";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <663 0x10000>;
+	qcom,board-id = <34 0>;
+};
diff --git a/nxp/parrot-nfc-pinctrl.dtsi b/nxp/parrot-nfc-pinctrl.dtsi
new file mode 100644
index 00000000..90ddf11e
--- /dev/null
+++ b/nxp/parrot-nfc-pinctrl.dtsi
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&tlmm {
+	nfc {
+		nfc_int_active: nfc_int_active {
+			/* active state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio9";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio9";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_int_suspend: nfc_int_suspend {
+			/* sleep state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio9";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio9";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_enable_active: nfc_enable_active {
+			mux {
+				/* Enable and Clock request gpios */
+				pins = "gpio6", "gpio7";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio6", "gpio7";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+
+		nfc_enable_suspend: nfc_enable_suspend {
+			mux {
+				pins = "gpio6", "gpio7";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio6", "gpio7";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+	}; //nfc
+}; //tlmm
diff --git a/nxp/parrot-nfc-qrd.dts b/nxp/parrot-nfc-qrd.dts
new file mode 100644
index 00000000..4f0c3fd4
--- /dev/null
+++ b/nxp/parrot-nfc-qrd.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-nfc-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot QRD";
+	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
+	qcom,msm-id = <663 0x10000>;
+	qcom,board-id = <0x1000B 0>;
+};
+
diff --git a/nxp/parrot-nfc.dts b/nxp/parrot-nfc.dts
new file mode 100644
index 00000000..132ee52d
--- /dev/null
+++ b/nxp/parrot-nfc.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-nfc-pinctrl.dtsi"
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot SoC";
+	compatible = "qcom,parrot";
+	qcom,msm-id = <663 0x10000>;
+	qcom,board-id = <0 0>;
+};

From c980039d870a07dbdda5cac424ee5fbc3e7f6c51 Mon Sep 17 00:00:00 2001
From: Khageswararao Rao B <quic_kraob@quicinc.com>
Date: Sat, 22 Jun 2024 12:24:34 +0530
Subject: [PATCH 10/27] [nfc][dts]: New msmid update for parrot66

Updated new msmids for parrot66.

Change-Id: I7c4aef47c4e8e844d45baf2762bca40f89bbc9ab
---
 nxp/parrot-nfc-atp.dts | 4 +++-
 nxp/parrot-nfc-idp.dts | 6 ++++--
 nxp/parrot-nfc-qrd.dts | 6 ++++--
 nxp/parrot-nfc.dts     | 4 +++-
 4 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/nxp/parrot-nfc-atp.dts b/nxp/parrot-nfc-atp.dts
index 51ca0813..ea06a040 100644
--- a/nxp/parrot-nfc-atp.dts
+++ b/nxp/parrot-nfc-atp.dts
@@ -12,6 +12,8 @@
 / {
 	model = "Qualcomm Technologies, Inc. Parrot ATP";
 	compatible = "qcom,parrot-atp", "qcom,parrot", "qcom,atp";
-	qcom,msm-id = <663 0x10000>;
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>,
+			<663 0x10000>;
 	qcom,board-id = <33 0>;
 };
diff --git a/nxp/parrot-nfc-idp.dts b/nxp/parrot-nfc-idp.dts
index dacd8178..971171f6 100644
--- a/nxp/parrot-nfc-idp.dts
+++ b/nxp/parrot-nfc-idp.dts
@@ -12,6 +12,8 @@
 / {
 	model = "Qualcomm Technologies, Inc. Parrot IDP";
 	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
-	qcom,msm-id = <663 0x10000>;
-	qcom,board-id = <34 0>;
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>,
+			<663 0x10000>;
+	qcom,board-id = <34 0>, <34 1>;
 };
diff --git a/nxp/parrot-nfc-qrd.dts b/nxp/parrot-nfc-qrd.dts
index 4f0c3fd4..6f721b50 100644
--- a/nxp/parrot-nfc-qrd.dts
+++ b/nxp/parrot-nfc-qrd.dts
@@ -11,8 +11,10 @@
 
 / {
 	model = "Qualcomm Technologies, Inc. Parrot QRD";
-	compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
-	qcom,msm-id = <663 0x10000>;
+	compatible = "qcom,parrot-qrd";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>,
+			<663 0x10000>;
 	qcom,board-id = <0x1000B 0>;
 };
 
diff --git a/nxp/parrot-nfc.dts b/nxp/parrot-nfc.dts
index 132ee52d..6117a63a 100644
--- a/nxp/parrot-nfc.dts
+++ b/nxp/parrot-nfc.dts
@@ -11,6 +11,8 @@
 / {
 	model = "Qualcomm Technologies, Inc. Parrot SoC";
 	compatible = "qcom,parrot";
-	qcom,msm-id = <663 0x10000>;
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>,
+			<663 0x10000>;
 	qcom,board-id = <0 0>;
 };

From bc61fa2fe011280defa38750f4dccff6f32771bc Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Fri, 24 May 2024 10:04:55 +0530
Subject: [PATCH 11/27] ARM: dts: msm: Add NFC device node for ravelin

Device node changes required on ravelin,
describing the GPIO configuration for
Nfc controller chip.

Modified corresponding Nfc device node
for ATP, IDP & QRD platforms

Change-Id: I331d0ad5aff3cd51bff5cf5268fbfe58c71d8280
---
 Kbuild                       |  7 ++++
 nxp/ravelin-nfc-atp.dts      | 17 ++++++++++
 nxp/ravelin-nfc-common.dtsi  | 28 +++++++++++++++
 nxp/ravelin-nfc-idp.dts      | 17 ++++++++++
 nxp/ravelin-nfc-pinctrl.dtsi | 66 ++++++++++++++++++++++++++++++++++++
 nxp/ravelin-nfc-qrd.dts      | 18 ++++++++++
 nxp/ravelin-nfc.dts          | 17 ++++++++++
 7 files changed, 170 insertions(+)
 create mode 100644 nxp/ravelin-nfc-atp.dts
 create mode 100644 nxp/ravelin-nfc-common.dtsi
 create mode 100644 nxp/ravelin-nfc-idp.dts
 create mode 100644 nxp/ravelin-nfc-pinctrl.dtsi
 create mode 100644 nxp/ravelin-nfc-qrd.dts
 create mode 100644 nxp/ravelin-nfc.dts

diff --git a/Kbuild b/Kbuild
index cc665c7c..eb8f4603 100644
--- a/Kbuild
+++ b/Kbuild
@@ -21,6 +21,13 @@ dtbo-y += nxp/parrot-nfc.dtbo \
           nxp/parrot-nfc-atp.dtbo
 endif
 
+ifeq ($(CONFIG_ARCH_RAVELIN),y)
+dtbo-y += nxp/ravelin-nfc.dtbo \
+          nxp/ravelin-nfc-qrd.dtbo \
+          nxp/ravelin-nfc-idp.dtbo \
+          nxp/ravelin-nfc-atp.dtbo
+endif
+
 always-y        := $(dtb-y) $(dtbo-y)
 subdir-y        := $(dts-dirs)
 clean-files     := *.dtb *.dtbo
diff --git a/nxp/ravelin-nfc-atp.dts b/nxp/ravelin-nfc-atp.dts
new file mode 100644
index 00000000..801c3056
--- /dev/null
+++ b/nxp/ravelin-nfc-atp.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "ravelin-nfc-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Ravelin ATP";
+	compatible = "qcom,ravelin-atp", "qcom,ravelin", "qcom,atp";
+	qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>, <663 0x10000>;
+	qcom,board-id = <33 0>;
+};
diff --git a/nxp/ravelin-nfc-common.dtsi b/nxp/ravelin-nfc-common.dtsi
new file mode 100644
index 00000000..312a7235
--- /dev/null
+++ b/nxp/ravelin-nfc-common.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&qupv3_se0_i2c {
+	status = "ok";
+	qcom,clk-freq-out = <1000000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	nq@28 {
+		compatible = "qcom,sn-nci";
+		reg = <0x28>;
+		qcom,sn-irq = <&tlmm 9 0x00>;
+		qcom,sn-ven = <&tlmm 6 0x00>;
+		qcom,sn-clkreq = <&tlmm 7 0x00>;
+		qcom,sn-vdd-1p8-supply = <&L21B>;
+		qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
+		qcom,sn-vdd-1p8-current = <157000>;
+		interrupt-parent = <&tlmm>;
+		interrupts = <9 0>;
+		interrupt-names = "nfc_irq";
+		pinctrl-names = "nfc_active", "nfc_suspend";
+		pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
+		pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
+	};
+};
diff --git a/nxp/ravelin-nfc-idp.dts b/nxp/ravelin-nfc-idp.dts
new file mode 100644
index 00000000..4b5ee96d
--- /dev/null
+++ b/nxp/ravelin-nfc-idp.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "ravelin-nfc-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Ravelin IDP";
+	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
+	qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>, <663 0x10000>;
+	qcom,board-id = <34 0>;
+};
diff --git a/nxp/ravelin-nfc-pinctrl.dtsi b/nxp/ravelin-nfc-pinctrl.dtsi
new file mode 100644
index 00000000..90ddf11e
--- /dev/null
+++ b/nxp/ravelin-nfc-pinctrl.dtsi
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&tlmm {
+	nfc {
+		nfc_int_active: nfc_int_active {
+			/* active state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio9";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio9";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_int_suspend: nfc_int_suspend {
+			/* sleep state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio9";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio9";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_enable_active: nfc_enable_active {
+			mux {
+				/* Enable and Clock request gpios */
+				pins = "gpio6", "gpio7";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio6", "gpio7";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+
+		nfc_enable_suspend: nfc_enable_suspend {
+			mux {
+				pins = "gpio6", "gpio7";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio6", "gpio7";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+	}; //nfc
+}; //tlmm
diff --git a/nxp/ravelin-nfc-qrd.dts b/nxp/ravelin-nfc-qrd.dts
new file mode 100644
index 00000000..ed7330cf
--- /dev/null
+++ b/nxp/ravelin-nfc-qrd.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "ravelin-nfc-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Ravelin QRD";
+	compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
+	qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>, <653 0x10000>,
+                      <654 0x10000>, <663 0x10000>;
+	qcom,board-id = <0x1000B 0>;
+};
diff --git a/nxp/ravelin-nfc.dts b/nxp/ravelin-nfc.dts
new file mode 100644
index 00000000..e9e3bfdc
--- /dev/null
+++ b/nxp/ravelin-nfc.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "ravelin-nfc-pinctrl.dtsi"
+/ {
+	model = "Qualcomm Technologies, Inc. Ravelin SoC";
+	compatible = "qcom,ravelin";
+	qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>, <653 0x10000>,
+                      <654 0x10000>, <663 0x10000>;
+	qcom,board-id = <0 0>;
+};

From 71898137ac3932cc0dfbb85004472927a884e9d4 Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Tue, 9 Jul 2024 11:37:33 +0530
Subject: [PATCH 12/27] [NFC][DTS]: Remove Unused MSM-ID's

- Removed Unused MSM-ID's

Change-Id: I098839f8b25ab2e3968ec3428c3f6a9af5b2f424
---
 nxp/ravelin-nfc-atp.dts | 2 +-
 nxp/ravelin-nfc-idp.dts | 2 +-
 nxp/ravelin-nfc-qrd.dts | 3 +--
 3 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/nxp/ravelin-nfc-atp.dts b/nxp/ravelin-nfc-atp.dts
index 801c3056..b09bb368 100644
--- a/nxp/ravelin-nfc-atp.dts
+++ b/nxp/ravelin-nfc-atp.dts
@@ -12,6 +12,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin ATP";
 	compatible = "qcom,ravelin-atp", "qcom,ravelin", "qcom,atp";
-	qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>, <663 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>;
 	qcom,board-id = <33 0>;
 };
diff --git a/nxp/ravelin-nfc-idp.dts b/nxp/ravelin-nfc-idp.dts
index 4b5ee96d..9e0be587 100644
--- a/nxp/ravelin-nfc-idp.dts
+++ b/nxp/ravelin-nfc-idp.dts
@@ -12,6 +12,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin IDP";
 	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
-	qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>, <663 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>;
 	qcom,board-id = <34 0>;
 };
diff --git a/nxp/ravelin-nfc-qrd.dts b/nxp/ravelin-nfc-qrd.dts
index ed7330cf..fab15c32 100644
--- a/nxp/ravelin-nfc-qrd.dts
+++ b/nxp/ravelin-nfc-qrd.dts
@@ -12,7 +12,6 @@
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin QRD";
 	compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
-	qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>, <653 0x10000>,
-                      <654 0x10000>, <663 0x10000>;
+	qcom,msm-id = <568 0x10000>, <602 0x10000>;
 	qcom,board-id = <0x1000B 0>;
 };

From 66519741f1fd0bdfd9582780268b99f403b765c1 Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Wed, 17 Jul 2024 16:28:48 +0530
Subject: [PATCH 13/27] [NFC][DTS]: Fix the FW upgrade issue

- Added missed FW gpio changes.

Change-Id: Ifafd2041799cf1d0b0b80b2b5a601916280f017a
---
 nxp/ravelin-nfc-common.dtsi  |  1 +
 nxp/ravelin-nfc-pinctrl.dtsi | 10 +++++-----
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/nxp/ravelin-nfc-common.dtsi b/nxp/ravelin-nfc-common.dtsi
index 312a7235..5b476256 100644
--- a/nxp/ravelin-nfc-common.dtsi
+++ b/nxp/ravelin-nfc-common.dtsi
@@ -14,6 +14,7 @@
 		reg = <0x28>;
 		qcom,sn-irq = <&tlmm 9 0x00>;
 		qcom,sn-ven = <&tlmm 6 0x00>;
+                qcom,sn-firm = <&tlmm 8 0x00>;
 		qcom,sn-clkreq = <&tlmm 7 0x00>;
 		qcom,sn-vdd-1p8-supply = <&L21B>;
 		qcom,sn-vdd-1p8-voltage = <1800000 1800000>;
diff --git a/nxp/ravelin-nfc-pinctrl.dtsi b/nxp/ravelin-nfc-pinctrl.dtsi
index 90ddf11e..790a1704 100644
--- a/nxp/ravelin-nfc-pinctrl.dtsi
+++ b/nxp/ravelin-nfc-pinctrl.dtsi
@@ -38,13 +38,13 @@
 
 		nfc_enable_active: nfc_enable_active {
 			mux {
-				/* Enable and Clock request gpios */
-				pins = "gpio6", "gpio7";
+				/* Enable, Firmware and Clock request gpios */
+				pins = "gpio6","gpio8", "gpio7";
 				function = "gpio";
 			};
 
 			config {
-				pins = "gpio6", "gpio7";
+				pins = "gpio6", "gpio8", "gpio7";
 				drive-strength = <2>; /* 2 MA */
 				bias-disable;
 			};
@@ -52,12 +52,12 @@
 
 		nfc_enable_suspend: nfc_enable_suspend {
 			mux {
-				pins = "gpio6", "gpio7";
+				pins = "gpio6", "gpio8", "gpio7";
 				function = "gpio";
 			};
 
 			config {
-				pins = "gpio6", "gpio7";
+				pins = "gpio6", "gpio8", "gpio7";
 				drive-strength = <2>; /* 2 MA */
 				bias-disable;
 			};

From d7d76cae476d2b7a27516acb47de0db1ec2758fc Mon Sep 17 00:00:00 2001
From: Varun Kumar <quic_var@quicinc.com>
Date: Mon, 1 Jul 2024 16:04:31 +0530
Subject: [PATCH 14/27] [NFC][DTS]: New board id update for parrot66

Updated new board id for parrot66.

Change-Id: Idd71f5454629a8013d4457674656fc30fdca61d6
---
 Kbuild                         |  3 ++-
 nxp/parrot-nfc-idp-wcn6755.dts | 17 +++++++++++++++++
 nxp/parrot-nfc-idp.dts         |  2 +-
 3 files changed, 20 insertions(+), 2 deletions(-)
 create mode 100644 nxp/parrot-nfc-idp-wcn6755.dts

diff --git a/Kbuild b/Kbuild
index cc665c7c..ff7174a0 100644
--- a/Kbuild
+++ b/Kbuild
@@ -18,7 +18,8 @@ ifeq ($(CONFIG_ARCH_PARROT),y)
 dtbo-y += nxp/parrot-nfc.dtbo \
           nxp/parrot-nfc-qrd.dtbo \
           nxp/parrot-nfc-idp.dtbo \
-          nxp/parrot-nfc-atp.dtbo
+          nxp/parrot-nfc-atp.dtbo \
+          nxp/parrot-nfc-idp-wcn6755.dtbo
 endif
 
 always-y        := $(dtb-y) $(dtbo-y)
diff --git a/nxp/parrot-nfc-idp-wcn6755.dts b/nxp/parrot-nfc-idp-wcn6755.dts
new file mode 100644
index 00000000..58f7f7d8
--- /dev/null
+++ b/nxp/parrot-nfc-idp-wcn6755.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-nfc-common.dtsi"
+ / {
+ 	model = "Qualcomm Technologies, Inc. Parrot WCN6755 IDP";
+ 	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+ 	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+ 			<633 0x10000>, <634 0x10000>, <638 0x10000>,
+ 			<663 0x10000>;
+ 	qcom,board-id = <34 5>;
+ };
diff --git a/nxp/parrot-nfc-idp.dts b/nxp/parrot-nfc-idp.dts
index 971171f6..f4d9ef24 100644
--- a/nxp/parrot-nfc-idp.dts
+++ b/nxp/parrot-nfc-idp.dts
@@ -15,5 +15,5 @@
 	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
 			<633 0x10000>, <634 0x10000>, <638 0x10000>,
 			<663 0x10000>;
-	qcom,board-id = <34 0>, <34 1>;
+	qcom,board-id = <34 0>, <34 1>, <34 5>;
 };

From 225c932f8e739e3814d4a5c1d9ca6e541058d880 Mon Sep 17 00:00:00 2001
From: Khageswararao Rao B <quic_kraob@quicinc.com>
Date: Wed, 25 Sep 2024 17:05:46 +0530
Subject: [PATCH 15/27] Nfc Dts: add dt support Parrot WCN3990 IDP + AMOLED +
 RCM

Added dts support for Parrot WCN3990 IDP + AMOLED + RCM.

Change-Id: I4b143ec9edf876dc866e03a6034c430217eb9fdb
---
 Kbuild                                    |  3 ++-
 nxp/parrot-nfc-idp-wcn3990-amoled-rcm.dts | 18 ++++++++++++++++++
 2 files changed, 20 insertions(+), 1 deletion(-)
 create mode 100644 nxp/parrot-nfc-idp-wcn3990-amoled-rcm.dts

diff --git a/Kbuild b/Kbuild
index 76f4ece0..ad1766ed 100644
--- a/Kbuild
+++ b/Kbuild
@@ -19,7 +19,8 @@ dtbo-y += nxp/parrot-nfc.dtbo \
           nxp/parrot-nfc-qrd.dtbo \
           nxp/parrot-nfc-idp.dtbo \
           nxp/parrot-nfc-atp.dtbo \
-          nxp/parrot-nfc-idp-wcn6755.dtbo
+          nxp/parrot-nfc-idp-wcn6755.dtbo \
+          nxp/parrot-nfc-idp-wcn3990-amoled-rcm.dtbo
 endif
 
 ifeq ($(CONFIG_ARCH_RAVELIN),y)
diff --git a/nxp/parrot-nfc-idp-wcn3990-amoled-rcm.dts b/nxp/parrot-nfc-idp-wcn3990-amoled-rcm.dts
new file mode 100644
index 00000000..c094edf0
--- /dev/null
+++ b/nxp/parrot-nfc-idp-wcn3990-amoled-rcm.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "parrot-nfc-common.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. Parrot WCN3990 IDP + AMOLED + RCM";
+	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
+	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
+			<633 0x10000>, <634 0x10000>, <638 0x10000>,
+			<663 0x10000>;
+	qcom,board-id = <34 3>;
+};

From 798c031c7cf20c83dfd9d41d69ba71ad18071b6c Mon Sep 17 00:00:00 2001
From: Varun Kumar <quic_varunkr@quicinc.com>
Date: Wed, 9 Oct 2024 11:03:13 +0530
Subject: [PATCH 16/27] [NFC][DTS]: Added NFC DTS support for tuna

Added NFC DTS support for tuna

Change-Id: Ie19e9f1e7988f15b62f5c5dc53cc7a7bf44d82df
---
 Kbuild                    |  5 ++-
 nxp/tuna-nfc-common.dtsi  | 27 ++++++++++++++++
 nxp/tuna-nfc-pinctrl.dtsi | 66 +++++++++++++++++++++++++++++++++++++++
 nxp/tuna-nfc.dts          | 16 ++++++++++
 st/tuna-nfc-common.dtsi   | 27 ++++++++++++++++
 st/tuna-nfc-pinctrl.dtsi  | 66 +++++++++++++++++++++++++++++++++++++++
 st/tuna-nfc.dts           | 16 ++++++++++
 7 files changed, 222 insertions(+), 1 deletion(-)
 create mode 100644 nxp/tuna-nfc-common.dtsi
 create mode 100644 nxp/tuna-nfc-pinctrl.dtsi
 create mode 100644 nxp/tuna-nfc.dts
 create mode 100644 st/tuna-nfc-common.dtsi
 create mode 100644 st/tuna-nfc-pinctrl.dtsi
 create mode 100644 st/tuna-nfc.dts

diff --git a/Kbuild b/Kbuild
index ad1766ed..07fcf44a 100644
--- a/Kbuild
+++ b/Kbuild
@@ -2,6 +2,7 @@ ifeq ($(CONFIG_ARCH_SUN),y)
 dtbo-y += nxp/sun-nfc.dtbo \
           nxp/sun-nfc-cdp.dtbo \
           nxp/sun-nfc-mtp.dtbo \
+          nxp/tuna-nfc.dtbo \
 
 dtbo-y += st/sun-nfc.dtbo \
           st/sun-nfc-mtp.dtbo \
@@ -11,7 +12,8 @@ dtbo-y += st/sun-nfc.dtbo \
           st/sun-nfc-qrd-sku2-v8.dtbo \
           st/sun-nfc-atp.dtbo \
           st/sun-mtp-kiwi-v8.dtbo \
-          st/sun-nfc-rcm.dtbo
+          st/sun-nfc-rcm.dtbo \
+          st/tuna-nfc.dtbo
 endif
 
 ifeq ($(CONFIG_ARCH_PARROT),y)
@@ -30,6 +32,7 @@ dtbo-y += nxp/ravelin-nfc.dtbo \
           nxp/ravelin-nfc-atp.dtbo
 endif
 
+
 always-y        := $(dtb-y) $(dtbo-y)
 subdir-y        := $(dts-dirs)
 clean-files     := *.dtb *.dtbo
diff --git a/nxp/tuna-nfc-common.dtsi b/nxp/tuna-nfc-common.dtsi
new file mode 100644
index 00000000..4874d49b
--- /dev/null
+++ b/nxp/tuna-nfc-common.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+#include "tuna-nfc-pinctrl.dtsi"
+
+&qupv3_se0_i2c {
+	status = "ok";
+	qcom,clk-freq-out = <1000000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	nq@28 {
+		compatible = "qcom,sn-nci";
+		reg = <0x28>;
+		qcom,sn-irq = <&tlmm 55 0x00>;
+		qcom,sn-ven = <&tlmm 114 0x00>;
+		qcom,sn-clkreq = <&tlmm 115 0x00>;
+		qcom,sn-szone = "enable";
+		interrupt-parent = <&tlmm>;
+		interrupts = <55 0>;
+		interrupt-names = "nfc_irq";
+		pinctrl-names = "nfc_active", "nfc_suspend";
+		pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
+		pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
+	};
+};
diff --git a/nxp/tuna-nfc-pinctrl.dtsi b/nxp/tuna-nfc-pinctrl.dtsi
new file mode 100644
index 00000000..fa234eff
--- /dev/null
+++ b/nxp/tuna-nfc-pinctrl.dtsi
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&tlmm {
+	nfc {
+		nfc_int_active: nfc_int_active {
+			/* active state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio55";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio55";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_int_suspend: nfc_int_suspend {
+			/* sleep state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio55";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio55";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_enable_active: nfc_enable_active {
+			mux {
+				/* Enable, and Clock request gpios */
+				pins = "gpio114", "gpio115";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio114", "gpio115";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+
+		nfc_enable_suspend: nfc_enable_suspend {
+			mux {
+				pins = "gpio114", "gpio115";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio114", "gpio115";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+	}; //nfc
+}; //tlmm
diff --git a/nxp/tuna-nfc.dts b/nxp/tuna-nfc.dts
new file mode 100644
index 00000000..9dab700a
--- /dev/null
+++ b/nxp/tuna-nfc.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "tuna-nfc-common.dtsi"
+/ {
+        model = "Qualcomm Technologies, Inc. Tuna SoC";
+        compatible = "qcom,tuna";
+        qcom,msm-id = <681 0x10000>, <655 0x10000>;
+        qcom,board-id = <33 0>, <1 0>, <8 0>, <11 0>, <21 0>;
+};
diff --git a/st/tuna-nfc-common.dtsi b/st/tuna-nfc-common.dtsi
new file mode 100644
index 00000000..58dcdf18
--- /dev/null
+++ b/st/tuna-nfc-common.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "tuna-nfc-pinctrl.dtsi"
+
+&qupv3_se0_i2c {
+        status = "ok";
+        qcom,clk-freq-out = <1000000>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        st21nfc: st21nfc@08 {
+                compatible = "st,st21nfc";
+                reg = <0x08>;
+                irq-gpios = <&tlmm 55 0x00>;
+                reset-gpios = <&tlmm 114 0x00>;
+                clkreq-gpios = <&tlmm 115 0x00>;
+                interrupt-parent = <&tlmm>;
+                interrupts = <55 0>;
+                interrupt-names = "nfc_irq";
+                pinctrl-names = "nfc_active", "nfc_suspend";
+                pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
+                pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
+        };
+};
diff --git a/st/tuna-nfc-pinctrl.dtsi b/st/tuna-nfc-pinctrl.dtsi
new file mode 100644
index 00000000..fa234eff
--- /dev/null
+++ b/st/tuna-nfc-pinctrl.dtsi
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&tlmm {
+	nfc {
+		nfc_int_active: nfc_int_active {
+			/* active state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio55";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio55";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_int_suspend: nfc_int_suspend {
+			/* sleep state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio55";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio55";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_enable_active: nfc_enable_active {
+			mux {
+				/* Enable, and Clock request gpios */
+				pins = "gpio114", "gpio115";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio114", "gpio115";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+
+		nfc_enable_suspend: nfc_enable_suspend {
+			mux {
+				pins = "gpio114", "gpio115";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio114", "gpio115";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+	}; //nfc
+}; //tlmm
diff --git a/st/tuna-nfc.dts b/st/tuna-nfc.dts
new file mode 100644
index 00000000..9dab700a
--- /dev/null
+++ b/st/tuna-nfc.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "tuna-nfc-common.dtsi"
+/ {
+        model = "Qualcomm Technologies, Inc. Tuna SoC";
+        compatible = "qcom,tuna";
+        qcom,msm-id = <681 0x10000>, <655 0x10000>;
+        qcom,board-id = <33 0>, <1 0>, <8 0>, <11 0>, <21 0>;
+};

From 0486f7da17e5da648ab1c10509e378d1513f4014 Mon Sep 17 00:00:00 2001
From: Varun Kumar <quic_varunkr@quicinc.com>
Date: Thu, 17 Oct 2024 11:49:56 +0530
Subject: [PATCH 17/27] [NFC][DTS]: added board id for mtp tuna

added board id for mtp tuna

Change-Id: I965948d2c0808406258518525f7149bed40fced2
---
 nxp/tuna-nfc.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/nxp/tuna-nfc.dts b/nxp/tuna-nfc.dts
index 9dab700a..3c314ca8 100644
--- a/nxp/tuna-nfc.dts
+++ b/nxp/tuna-nfc.dts
@@ -12,5 +12,5 @@
         model = "Qualcomm Technologies, Inc. Tuna SoC";
         compatible = "qcom,tuna";
         qcom,msm-id = <681 0x10000>, <655 0x10000>;
-        qcom,board-id = <33 0>, <1 0>, <8 0>, <11 0>, <21 0>;
+        qcom,board-id = <8 4>;
 };

From 39dab7163a50885775381d390c1ce1ea701f0d98 Mon Sep 17 00:00:00 2001
From: Varun Kumar <quic_varunkr@quicinc.com>
Date: Mon, 21 Oct 2024 12:46:12 +0530
Subject: [PATCH 18/27] [NFC][DTS]: Added support for sun mtp with 3.5 mm

Added support for sun mtp with 3.5 mm

Change-Id: I64b69e07bdfe97c3682e77242bad7b3f54d5f3ab
---
 nxp/sun-nfc-mtp.dts | 2 +-
 st/sun-nfc-mtp.dts  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/nxp/sun-nfc-mtp.dts b/nxp/sun-nfc-mtp.dts
index 4f0abc24..5e3861dd 100644
--- a/nxp/sun-nfc-mtp.dts
+++ b/nxp/sun-nfc-mtp.dts
@@ -15,5 +15,5 @@
         qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
 		      <0x100026a 0x10000>, <0x100026a 0x20000>,
 		      <0x100027f 0x10000>, <0x100027f 0x20000>;
-        qcom,board-id = <0x30008 0>;
+        qcom,board-id = <0x30008 0>, <0x70008 0>;
 };
diff --git a/st/sun-nfc-mtp.dts b/st/sun-nfc-mtp.dts
index f8a9d90d..e2605d5d 100644
--- a/st/sun-nfc-mtp.dts
+++ b/st/sun-nfc-mtp.dts
@@ -14,5 +14,5 @@
 	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
 		      <0x100026a 0x10000>, <0x100026a 0x20000>,
 		      <0x100027f 0x10000>, <0x100027f 0x20000>;
-	qcom,board-id = <0x8 0>, <0x20008 0>, <0x40008 0>, <0x50008 0>;
+	qcom,board-id = <0x8 0>, <0x20008 0>, <0x40008 0>, <0x50008 0>, <0x60008 0>;
 };

From a578356476c6bf0ccc317505464aa7d7de9c85d5 Mon Sep 17 00:00:00 2001
From: Varun Kumar <quic_varunkr@quicinc.com>
Date: Tue, 22 Oct 2024 12:04:25 +0530
Subject: [PATCH 19/27] [NFC][DTS]: Added support for sun qrd with 3.5 mm

Added support for sun qrd with 3.5 mm

Change-Id: Ie25c88d9045fdef950dfd86a39f043eb0eb18e3d
---
 Kbuild              |  1 +
 nxp/sun-nfc-qrd.dts | 20 ++++++++++++++++++++
 2 files changed, 21 insertions(+)
 create mode 100644 nxp/sun-nfc-qrd.dts

diff --git a/Kbuild b/Kbuild
index 07fcf44a..d4bcf0dc 100644
--- a/Kbuild
+++ b/Kbuild
@@ -2,6 +2,7 @@ ifeq ($(CONFIG_ARCH_SUN),y)
 dtbo-y += nxp/sun-nfc.dtbo \
           nxp/sun-nfc-cdp.dtbo \
           nxp/sun-nfc-mtp.dtbo \
+          nxp/sun-nfc-qrd.dtbo \
           nxp/tuna-nfc.dtbo \
 
 dtbo-y += st/sun-nfc.dtbo \
diff --git a/nxp/sun-nfc-qrd.dts b/nxp/sun-nfc-qrd.dts
new file mode 100644
index 00000000..c91e0f50
--- /dev/null
+++ b/nxp/sun-nfc-qrd.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "sun-nfc-common.dtsi"
+
+/ {
+        model = "Qualcomm Technologies, Inc. Sun QRD";
+	compatible = "qcom,sun-qrd", "qcom,sun", "qcom,sunp-qrd", "qcom,sunp",
+			   "qcom,qrd";
+	qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
+		      <0x100026a 0x10000>, <0x100026a 0x20000>,
+		      <0x100027f 0x10000>, <0x100027f 0x20000>;
+	qcom,board-id = <0x4000B 0>;
+};

From 84e96845d0e45bf53cc2d026565c7e01866257c4 Mon Sep 17 00:00:00 2001
From: Varun Kumar <quic_varunkr@quicinc.com>
Date: Mon, 28 Oct 2024 17:49:18 +0530
Subject: [PATCH 20/27] [NFC][DTS]: Added support for new soc for tuna

Added support for new soc for tuna

Change-Id: I8cc9417748492af5b36863fb835114d3cc737b33
---
 nxp/tuna-nfc.dts | 2 +-
 st/tuna-nfc.dts  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/nxp/tuna-nfc.dts b/nxp/tuna-nfc.dts
index 3c314ca8..936049e9 100644
--- a/nxp/tuna-nfc.dts
+++ b/nxp/tuna-nfc.dts
@@ -11,6 +11,6 @@
 / {
         model = "Qualcomm Technologies, Inc. Tuna SoC";
         compatible = "qcom,tuna";
-        qcom,msm-id = <681 0x10000>, <655 0x10000>;
+        qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>;
         qcom,board-id = <8 4>;
 };
diff --git a/st/tuna-nfc.dts b/st/tuna-nfc.dts
index 9dab700a..4073ea44 100644
--- a/st/tuna-nfc.dts
+++ b/st/tuna-nfc.dts
@@ -11,6 +11,6 @@
 / {
         model = "Qualcomm Technologies, Inc. Tuna SoC";
         compatible = "qcom,tuna";
-        qcom,msm-id = <681 0x10000>, <655 0x10000>;
+        qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>;
         qcom,board-id = <33 0>, <1 0>, <8 0>, <11 0>, <21 0>;
 };

From 5c8de517a1e231ab5975d36ababfd3f97639ec37 Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Wed, 27 Nov 2024 12:39:24 +0530
Subject: [PATCH 21/27] [NFC][DT]: Add DT support for kera target.

 - Added NFC DT support for kera target

Change-Id: Ifd3e75972623154ff80e80720b060b8844fe0d7e
---
 Kbuild                    |  4 ++-
 nxp/kera-nfc-common.dtsi  | 28 ++++++++++++++++
 nxp/kera-nfc-pinctrl.dtsi | 67 +++++++++++++++++++++++++++++++++++++++
 nxp/kera-nfc.dts          | 16 ++++++++++
 st/kera-nfc-common.dtsi   | 27 ++++++++++++++++
 st/kera-nfc-pinctrl.dtsi  | 66 ++++++++++++++++++++++++++++++++++++++
 st/kera-nfc.dts           | 16 ++++++++++
 7 files changed, 223 insertions(+), 1 deletion(-)
 create mode 100644 nxp/kera-nfc-common.dtsi
 create mode 100644 nxp/kera-nfc-pinctrl.dtsi
 create mode 100644 nxp/kera-nfc.dts
 create mode 100644 st/kera-nfc-common.dtsi
 create mode 100644 st/kera-nfc-pinctrl.dtsi
 create mode 100644 st/kera-nfc.dts

diff --git a/Kbuild b/Kbuild
index d4bcf0dc..a1ea245a 100644
--- a/Kbuild
+++ b/Kbuild
@@ -4,6 +4,7 @@ dtbo-y += nxp/sun-nfc.dtbo \
           nxp/sun-nfc-mtp.dtbo \
           nxp/sun-nfc-qrd.dtbo \
           nxp/tuna-nfc.dtbo \
+          nxp/kera-nfc.dtbo \
 
 dtbo-y += st/sun-nfc.dtbo \
           st/sun-nfc-mtp.dtbo \
@@ -14,7 +15,8 @@ dtbo-y += st/sun-nfc.dtbo \
           st/sun-nfc-atp.dtbo \
           st/sun-mtp-kiwi-v8.dtbo \
           st/sun-nfc-rcm.dtbo \
-          st/tuna-nfc.dtbo
+          st/tuna-nfc.dtbo \
+          st/kera-nfc.dtbo
 endif
 
 ifeq ($(CONFIG_ARCH_PARROT),y)
diff --git a/nxp/kera-nfc-common.dtsi b/nxp/kera-nfc-common.dtsi
new file mode 100644
index 00000000..c15f739d
--- /dev/null
+++ b/nxp/kera-nfc-common.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "kera-nfc-pinctrl.dtsi"
+&qupv3_se9_i2c {
+	status = "ok";
+	qcom,clk-freq-out = <1000000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	nq@28 {
+		compatible = "qcom,sn-nci";
+		reg = <0x28>;
+		qcom,sn-irq = <&tlmm 7 0x00>;
+		qcom,sn-ven = <&tlmm 57 0x00>;
+		qcom,sn-clkreq = <&tlmm 6 0x00>;
+		qcom,sn-szone = "enable";
+		interrupt-parent = <&tlmm>;
+		interrupts = <7 0>;
+		interrupt-names = "nfc_irq";
+		pinctrl-names = "nfc_active", "nfc_suspend";
+		pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
+		pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
+	};
+};
+
diff --git a/nxp/kera-nfc-pinctrl.dtsi b/nxp/kera-nfc-pinctrl.dtsi
new file mode 100644
index 00000000..f0ac326d
--- /dev/null
+++ b/nxp/kera-nfc-pinctrl.dtsi
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&tlmm {
+	nfc {
+		nfc_int_active: nfc_int_active {
+			/* active state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio7";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio7";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_int_suspend: nfc_int_suspend {
+			/* sleep state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio7";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio7";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_enable_active: nfc_enable_active {
+			mux {
+				/* Enable, and Clock request gpios */
+				pins = "gpio57", "gpio6";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio57", "gpio6";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+
+		nfc_enable_suspend: nfc_enable_suspend {
+			mux {
+				pins = "gpio57", "gpio6";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio57", "gpio6";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+	}; //nfc
+}; //tlmm
+
diff --git a/nxp/kera-nfc.dts b/nxp/kera-nfc.dts
new file mode 100644
index 00000000..d7bc1aa7
--- /dev/null
+++ b/nxp/kera-nfc.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-nfc-common.dtsi"
+/ {
+        model = "Qualcomm Technologies, Inc. Kera SoC";
+        compatible = "qcom,kera";
+        qcom,msm-id = <686 0x10000>, <659 0x10000>;
+        qcom,board-id = <0x10008 0>, <33 0>, <0x10001 0>, <0x1000B 0>, <0x10015 0>;
+};
diff --git a/st/kera-nfc-common.dtsi b/st/kera-nfc-common.dtsi
new file mode 100644
index 00000000..abca9415
--- /dev/null
+++ b/st/kera-nfc-common.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "kera-nfc-pinctrl.dtsi"
+
+&qupv3_se9_i2c {
+        status = "ok";
+        qcom,clk-freq-out = <1000000>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        st21nfc: st21nfc@08 {
+                compatible = "st,st21nfc";
+                reg = <0x08>;
+                irq-gpios = <&tlmm 7 0x00>;
+                reset-gpios = <&tlmm 57 0x00>;
+                clkreq-gpios = <&tlmm 6 0x00>;
+                interrupt-parent = <&tlmm>;
+                interrupts = <7 0>;
+                interrupt-names = "nfc_irq";
+                pinctrl-names = "nfc_active", "nfc_suspend";
+                pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
+                pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
+        };
+};
diff --git a/st/kera-nfc-pinctrl.dtsi b/st/kera-nfc-pinctrl.dtsi
new file mode 100644
index 00000000..7e4a17ad
--- /dev/null
+++ b/st/kera-nfc-pinctrl.dtsi
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&tlmm {
+	nfc {
+		nfc_int_active: nfc_int_active {
+			/* active state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio7";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio7";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_int_suspend: nfc_int_suspend {
+			/* sleep state */
+			mux {
+				/* NFC Read Interrupt */
+				pins = "gpio7";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio7";
+				drive-strength = <2>; /* 2 MA */
+				bias-pull-down;
+			};
+		};
+
+		nfc_enable_active: nfc_enable_active {
+			mux {
+				/* Enable, and Clock request gpios */
+				pins = "gpio57", "gpio6";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio57", "gpio6";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+
+		nfc_enable_suspend: nfc_enable_suspend {
+			mux {
+				pins = "gpio57", "gpio6";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio57", "gpio6";
+				drive-strength = <2>; /* 2 MA */
+				bias-disable;
+			};
+		};
+	}; //nfc
+}; //tlmm
diff --git a/st/kera-nfc.dts b/st/kera-nfc.dts
new file mode 100644
index 00000000..4a68a621
--- /dev/null
+++ b/st/kera-nfc.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "kera-nfc-common.dtsi"
+/ {
+        model = "Qualcomm Technologies, Inc. Kera SoC";
+        compatible = "qcom,kera";
+        qcom,msm-id = <686 0x10000>, <659 0x10000>;
+        qcom,board-id = <0x30008 0>, <0x30008 1>;
+};

From b25bd778c08e8170050617f2bb8ee0092c9b3c8b Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Sat, 28 Dec 2024 15:32:58 +0530
Subject: [PATCH 22/27] [NFC][DT]: Add all board ID's kera target

- Added all board ID's kera

Change-Id: Ie747dd7d4c2e8c1a3fc15b3cf31c11a43f55a1ae
---
 nxp/kera-nfc.dts | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/nxp/kera-nfc.dts b/nxp/kera-nfc.dts
index d7bc1aa7..2cd005d2 100644
--- a/nxp/kera-nfc.dts
+++ b/nxp/kera-nfc.dts
@@ -12,5 +12,8 @@
         model = "Qualcomm Technologies, Inc. Kera SoC";
         compatible = "qcom,kera";
         qcom,msm-id = <686 0x10000>, <659 0x10000>;
-        qcom,board-id = <0x10008 0>, <33 0>, <0x10001 0>, <0x1000B 0>, <0x10015 0>;
+        qcom,board-id = <33 0>, <0x10001 0>, <0x30001 0>, <0x20001 0>, <0x40001 0>,
+                    <0x10008 0>, <0x20008 0>, <0x20008 1>, <0x10008 1>, <0x10015 0>,
+                    <0x10015 1>, <0x20015 0>, <0x20015 1>, <0x30015 0>, <0x30015 1>,
+                    <0x1000B 0>, <0x3000B 0>, <0x2000B 0>, <0x3000B 1>;
 };

From c8cfe0d8487cf93db868f0c3a96e4b7b32ff68be Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Sat, 28 Dec 2024 15:32:58 +0530
Subject: [PATCH 23/27] [NFC][DT]: Add all board ID's kera target

- Added all board ID's kera

Change-Id: Ie747dd7d4c2e8c1a3fc15b3cf31c11a43f55a1ae
(cherry picked from commit b25bd778c08e8170050617f2bb8ee0092c9b3c8b)
---
 nxp/kera-nfc.dts | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/nxp/kera-nfc.dts b/nxp/kera-nfc.dts
index d7bc1aa7..2cd005d2 100644
--- a/nxp/kera-nfc.dts
+++ b/nxp/kera-nfc.dts
@@ -12,5 +12,8 @@
         model = "Qualcomm Technologies, Inc. Kera SoC";
         compatible = "qcom,kera";
         qcom,msm-id = <686 0x10000>, <659 0x10000>;
-        qcom,board-id = <0x10008 0>, <33 0>, <0x10001 0>, <0x1000B 0>, <0x10015 0>;
+        qcom,board-id = <33 0>, <0x10001 0>, <0x30001 0>, <0x20001 0>, <0x40001 0>,
+                    <0x10008 0>, <0x20008 0>, <0x20008 1>, <0x10008 1>, <0x10015 0>,
+                    <0x10015 1>, <0x20015 0>, <0x20015 1>, <0x30015 0>, <0x30015 1>,
+                    <0x1000B 0>, <0x3000B 0>, <0x2000B 0>, <0x3000B 1>;
 };

From 895b45eac5d897b339d0d368dfc90f4e6a549655 Mon Sep 17 00:00:00 2001
From: Varun Kumar <quic_varunkr@quicinc.com>
Date: Fri, 24 Jan 2025 10:56:16 +0530
Subject: [PATCH 24/27] [NFC][DTS]: added board id for Tuna MTP + kiwi WLAN +
 Harmonium

added board id for Tuna MTP + kiwi WLAN + Harmonium

Change-Id: Ic8242b8592bc5795f4647dae186fdb2fa9097658
---
 st/tuna-nfc.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/st/tuna-nfc.dts b/st/tuna-nfc.dts
index 4073ea44..45be6f56 100644
--- a/st/tuna-nfc.dts
+++ b/st/tuna-nfc.dts
@@ -12,5 +12,5 @@
         model = "Qualcomm Technologies, Inc. Tuna SoC";
         compatible = "qcom,tuna";
         qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>;
-        qcom,board-id = <33 0>, <1 0>, <8 0>, <11 0>, <21 0>;
+        qcom,board-id = <33 0>, <1 0>, <8 0>, <8 3>, <11 0>, <21 0>;
 };

From d3f8de5d34497055b8c296ef73dbade5fe28402e Mon Sep 17 00:00:00 2001
From: Varun Kumar <quic_varunkr@quicinc.com>
Date: Fri, 24 Jan 2025 10:56:16 +0530
Subject: [PATCH 25/27] [NFC][DTS]: added board id for Tuna MTP + kiwi WLAN +
 Harmonium

added board id for Tuna MTP + kiwi WLAN + Harmonium

Change-Id: Ic8242b8592bc5795f4647dae186fdb2fa9097658
(cherry picked from commit 895b45eac5d897b339d0d368dfc90f4e6a549655)
---
 st/tuna-nfc.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/st/tuna-nfc.dts b/st/tuna-nfc.dts
index 4073ea44..45be6f56 100644
--- a/st/tuna-nfc.dts
+++ b/st/tuna-nfc.dts
@@ -12,5 +12,5 @@
         model = "Qualcomm Technologies, Inc. Tuna SoC";
         compatible = "qcom,tuna";
         qcom,msm-id = <681 0x10000>, <655 0x10000>, <694 0x10000>;
-        qcom,board-id = <33 0>, <1 0>, <8 0>, <11 0>, <21 0>;
+        qcom,board-id = <33 0>, <1 0>, <8 0>, <8 3>, <11 0>, <21 0>;
 };

From 8ed822a57ea483728cdc61d712c55ebe2ea0b74f Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Fri, 17 Jan 2025 12:54:50 +0530
Subject: [PATCH 26/27] [NFC][DT]: Add DT support to ravelin target,

 - Added DT support to ravelin 4GB DDR IDP and 4GB QRD targets.
 - Added all board IDs into single file.

Change-Id: Ibc70a684c8867b184ada4f8c339d394c787ec19c
---
 Kbuild                      |  5 +----
 nxp/ravelin-nfc-atp.dts     | 17 -----------------
 nxp/ravelin-nfc-common.dtsi |  2 ++
 nxp/ravelin-nfc-idp.dts     | 17 -----------------
 nxp/ravelin-nfc-qrd.dts     | 17 -----------------
 nxp/ravelin-nfc.dts         |  6 +++---
 6 files changed, 6 insertions(+), 58 deletions(-)
 delete mode 100644 nxp/ravelin-nfc-atp.dts
 delete mode 100644 nxp/ravelin-nfc-idp.dts
 delete mode 100644 nxp/ravelin-nfc-qrd.dts

diff --git a/Kbuild b/Kbuild
index a1ea245a..1ae2f2b2 100644
--- a/Kbuild
+++ b/Kbuild
@@ -29,10 +29,7 @@ dtbo-y += nxp/parrot-nfc.dtbo \
 endif
 
 ifeq ($(CONFIG_ARCH_RAVELIN),y)
-dtbo-y += nxp/ravelin-nfc.dtbo \
-          nxp/ravelin-nfc-qrd.dtbo \
-          nxp/ravelin-nfc-idp.dtbo \
-          nxp/ravelin-nfc-atp.dtbo
+dtbo-y += nxp/ravelin-nfc.dtbo
 endif
 
 
diff --git a/nxp/ravelin-nfc-atp.dts b/nxp/ravelin-nfc-atp.dts
deleted file mode 100644
index b09bb368..00000000
--- a/nxp/ravelin-nfc-atp.dts
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: BSD-3-Clause
-
-/*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
- */
-
-/dts-v1/;
-/plugin/;
-
-#include "ravelin-nfc-common.dtsi"
-
-/ {
-	model = "Qualcomm Technologies, Inc. Ravelin ATP";
-	compatible = "qcom,ravelin-atp", "qcom,ravelin", "qcom,atp";
-	qcom,msm-id = <568 0x10000>, <602 0x10000>;
-	qcom,board-id = <33 0>;
-};
diff --git a/nxp/ravelin-nfc-common.dtsi b/nxp/ravelin-nfc-common.dtsi
index 5b476256..9cd4d439 100644
--- a/nxp/ravelin-nfc-common.dtsi
+++ b/nxp/ravelin-nfc-common.dtsi
@@ -4,6 +4,8 @@
  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
+#include "ravelin-nfc-pinctrl.dtsi"
+
 &qupv3_se0_i2c {
 	status = "ok";
 	qcom,clk-freq-out = <1000000>;
diff --git a/nxp/ravelin-nfc-idp.dts b/nxp/ravelin-nfc-idp.dts
deleted file mode 100644
index 9e0be587..00000000
--- a/nxp/ravelin-nfc-idp.dts
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: BSD-3-Clause
-
-/*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
- */
-
-/dts-v1/;
-/plugin/;
-
-#include "ravelin-nfc-common.dtsi"
-
-/ {
-	model = "Qualcomm Technologies, Inc. Ravelin IDP";
-	compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp";
-	qcom,msm-id = <568 0x10000>, <602 0x10000>;
-	qcom,board-id = <34 0>;
-};
diff --git a/nxp/ravelin-nfc-qrd.dts b/nxp/ravelin-nfc-qrd.dts
deleted file mode 100644
index fab15c32..00000000
--- a/nxp/ravelin-nfc-qrd.dts
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: BSD-3-Clause
-
-/*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
- */
-
-/dts-v1/;
-/plugin/;
-
-#include "ravelin-nfc-common.dtsi"
-
-/ {
-	model = "Qualcomm Technologies, Inc. Ravelin QRD";
-	compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd";
-	qcom,msm-id = <568 0x10000>, <602 0x10000>;
-	qcom,board-id = <0x1000B 0>;
-};
diff --git a/nxp/ravelin-nfc.dts b/nxp/ravelin-nfc.dts
index e9e3bfdc..5422e356 100644
--- a/nxp/ravelin-nfc.dts
+++ b/nxp/ravelin-nfc.dts
@@ -7,11 +7,11 @@
 /dts-v1/;
 /plugin/;
 
-#include "ravelin-nfc-pinctrl.dtsi"
+#include "ravelin-nfc-common.dtsi"
 / {
 	model = "Qualcomm Technologies, Inc. Ravelin SoC";
 	compatible = "qcom,ravelin";
 	qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>, <653 0x10000>,
-                      <654 0x10000>, <663 0x10000>;
-	qcom,board-id = <0 0>;
+                      <654 0x10000>;
+	qcom,board-id = <33 0>,<34 0>, <0x1000B 0>, <34 0x601>,  <0x1000B 0x600>, <34 2>;
 };

From 7c6ef40bfddcc3a378e764c5da4fdb4614024c1f Mon Sep 17 00:00:00 2001
From: Amruth Naga <quic_amrunaga@quicinc.com>
Date: Mon, 14 Apr 2025 10:29:15 +0530
Subject: [PATCH 27/27] [NFC][DT]: Added new soc-ID's to support parrot target.

- Added new SOC-ID's to support parrot target

Change-Id: I4aabae8970f735a157ad87f5a119bb41728058aa
---
 nxp/parrot-nfc-atp.dts                    | 2 +-
 nxp/parrot-nfc-idp-wcn3990-amoled-rcm.dts | 2 +-
 nxp/parrot-nfc-idp-wcn6755.dts            | 2 +-
 nxp/parrot-nfc-idp.dts                    | 2 +-
 nxp/parrot-nfc-qrd.dts                    | 2 +-
 nxp/parrot-nfc.dts                        | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/nxp/parrot-nfc-atp.dts b/nxp/parrot-nfc-atp.dts
index ea06a040..a5ec33df 100644
--- a/nxp/parrot-nfc-atp.dts
+++ b/nxp/parrot-nfc-atp.dts
@@ -14,6 +14,6 @@
 	compatible = "qcom,parrot-atp", "qcom,parrot", "qcom,atp";
 	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
 			<633 0x10000>, <634 0x10000>, <638 0x10000>,
-			<663 0x10000>;
+			<663 0x10000>, <713 0x10000>, <714 0x10000>;
 	qcom,board-id = <33 0>;
 };
diff --git a/nxp/parrot-nfc-idp-wcn3990-amoled-rcm.dts b/nxp/parrot-nfc-idp-wcn3990-amoled-rcm.dts
index c094edf0..2acebba2 100644
--- a/nxp/parrot-nfc-idp-wcn3990-amoled-rcm.dts
+++ b/nxp/parrot-nfc-idp-wcn3990-amoled-rcm.dts
@@ -13,6 +13,6 @@
 	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
 	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
 			<633 0x10000>, <634 0x10000>, <638 0x10000>,
-			<663 0x10000>;
+			<663 0x10000>, <713 0x10000>, <714 0x10000>;
 	qcom,board-id = <34 3>;
 };
diff --git a/nxp/parrot-nfc-idp-wcn6755.dts b/nxp/parrot-nfc-idp-wcn6755.dts
index 58f7f7d8..b09f7068 100644
--- a/nxp/parrot-nfc-idp-wcn6755.dts
+++ b/nxp/parrot-nfc-idp-wcn6755.dts
@@ -12,6 +12,6 @@
  	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
  	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
  			<633 0x10000>, <634 0x10000>, <638 0x10000>,
- 			<663 0x10000>;
+ 			<663 0x10000>, <713 0x10000>, <714 0x10000>;
  	qcom,board-id = <34 5>;
  };
diff --git a/nxp/parrot-nfc-idp.dts b/nxp/parrot-nfc-idp.dts
index f4d9ef24..de504d1d 100644
--- a/nxp/parrot-nfc-idp.dts
+++ b/nxp/parrot-nfc-idp.dts
@@ -14,6 +14,6 @@
 	compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
 	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
 			<633 0x10000>, <634 0x10000>, <638 0x10000>,
-			<663 0x10000>;
+			<663 0x10000>, <713 0x10000>, <714 0x10000>;
 	qcom,board-id = <34 0>, <34 1>, <34 5>;
 };
diff --git a/nxp/parrot-nfc-qrd.dts b/nxp/parrot-nfc-qrd.dts
index 6f721b50..679cea7b 100644
--- a/nxp/parrot-nfc-qrd.dts
+++ b/nxp/parrot-nfc-qrd.dts
@@ -14,7 +14,7 @@
 	compatible = "qcom,parrot-qrd";
 	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
 			<633 0x10000>, <634 0x10000>, <638 0x10000>,
-			<663 0x10000>;
+			<663 0x10000>, <713 0x10000>, <714 0x10000>;
 	qcom,board-id = <0x1000B 0>;
 };
 
diff --git a/nxp/parrot-nfc.dts b/nxp/parrot-nfc.dts
index 6117a63a..14b167c6 100644
--- a/nxp/parrot-nfc.dts
+++ b/nxp/parrot-nfc.dts
@@ -13,6 +13,6 @@
 	compatible = "qcom,parrot";
 	qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
 			<633 0x10000>, <634 0x10000>, <638 0x10000>,
-			<663 0x10000>;
+			<663 0x10000>, <713 0x10000>, <714 0x10000>;
 	qcom,board-id = <0 0>;
 };