Merge changes Id47a3d72,I7503fd04,I1ece1cc9,Idc433926,I28488932, ... into kernel.lnx.6.6.r1-rel

* changes:
  ARM: dts: msm: Add eUSB2 repeater nodes for tuna
  ARM: dts: msm: Adding dependency of iommu node on USB driver
  ARM: dts: msm: enabling mem-object node for tuna
  ARM: dts: msm: Modify Display and PCIe CRM devices for tuna
  ARM: dts: msm: Update memory map for kera
  ARM: dts: msm: Add power domain and interconnect for kgsl-smmu
This commit is contained in:
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2024-11-24 04:47:19 -08:00
committed by Gerrit - the friendly Code Review server
9 changed files with 88 additions and 53 deletions

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@@ -18,9 +18,9 @@
reg = <0x0 0x80e00000 0x0 0x400000>; reg = <0x0 0x80e00000 0x0 0x400000>;
}; };
cpucp_pdp_mem: cpucp_region@81200000 { cpucp_mem: cpucp_region@81200000 {
no-map; no-map;
reg = <0x0 0x81200000 0x0 0x200000>; reg = <0x0 0x81200000 0x0 0x100000>;
}; };
/* /*
@@ -77,14 +77,9 @@
no-map; no-map;
}; };
pdp_ns_shared_mem: pdp_ns_shared_region@81f00000 { cpucp_scandump_mem: cpucp_scandump_region@82200000 {
no-map; no-map;
reg = <0x0 0x81f00000 0x0 0x100000>; reg = <0x0 0x82200000 0x0 0x180000>;
};
cpucp_scandump_mem: cpucp_scandump_region@82000000 {
no-map;
reg = <0x0 0x82000000 0x0 0x380000>;
}; };
adsp_mhi_mem: adsp_mhi_region@82380000 { adsp_mhi_mem: adsp_mhi_region@82380000 {
@@ -124,87 +119,82 @@
dsm_partition_1_mem: dsm_partition_1_region@84a00000 { dsm_partition_1_mem: dsm_partition_1_region@84a00000 {
no-map; no-map;
reg = <0x0 0x84a00000 0x0 0x4900000>; reg = <0x0 0x84a00000 0x0 0x3700000>;
}; };
dsm_partition_2_mem: dsm_partition_2_region@89300000 { mpss_mem: mpss_region@88100000 {
no-map; no-map;
reg = <0x0 0x89300000 0x0 0xa80000>; reg = <0x0 0x88100000 0x0 0xcd00000>;
}; };
mpss_mem: mpss_region@89e00000 { q6_mpss_dtb_mem: q6_mpss_dtb_region@94e00000 {
no-map; no-map;
reg = <0x0 0x89e00000 0x0 0x11200000>; reg = <0x0 0x94e00000 0x0 0x80000>;
}; };
q6_mpss_dtb_mem: q6_mpss_dtb_region@9b000000 { ipa_fw_mem: ipa_fw_region@94e80000 {
no-map; no-map;
reg = <0x0 0x9b000000 0x0 0x80000>; reg = <0x0 0x94e80000 0x0 0x10000>;
}; };
ipa_fw_mem: ipa_fw_region@9b080000 { ipa_gsi_mem: ipa_gsi_region@94e90000 {
no-map; no-map;
reg = <0x0 0x9b080000 0x0 0x10000>; reg = <0x0 0x94e90000 0x0 0xa000>;
}; };
ipa_gsi_mem: ipa_gsi_region@9b090000 { gpu_microcode_mem: gpu_microcode_region@94e9a000 {
no-map; no-map;
reg = <0x0 0x9b090000 0x0 0xa000>; reg = <0x0 0x94e9a000 0x0 0x2000>;
}; };
gpu_microcode_mem: gpu_microcode_region@9b09a000 { camera_mem: camera_region@94f00000 {
no-map; no-map;
reg = <0x0 0x9b09a000 0x0 0x2000>; reg = <0x0 0x94f00000 0x0 0x800000>;
}; };
camera_mem: camera_region@9b300000 { camera_2_mem: camera_2_region@95700000 {
no-map; no-map;
reg = <0x0 0x9b300000 0x0 0x800000>; reg = <0x0 0x95700000 0x0 0x800000>;
}; };
camera_2_mem: camera_2_region@9bb00000 { video_mem: video_region@95f00000 {
no-map; no-map;
reg = <0x0 0x9bb00000 0x0 0x800000>; reg = <0x0 0x95f00000 0x0 0x800000>;
}; };
video_mem: video_region@9c300000 { cvp_mem: cvp_region@96700000 {
no-map; no-map;
reg = <0x0 0x9c300000 0x0 0x800000>; reg = <0x0 0x96700000 0x0 0x700000>;
}; };
cvp_mem: cvp_region@9cb00000 { soccp_mem: soccp_region@96e00000 {
no-map; no-map;
reg = <0x0 0x9cb00000 0x0 0x700000>; reg = <0x0 0x96e00000 0x0 0x180000>;
}; };
cdsp_mem: cdsp_region@9d200000 { wpss_mem: wpss_region@97000000 {
no-map; no-map;
reg = <0x0 0x9d200000 0x0 0x2000000>; reg = <0x0 0x97000000 0x0 0x1900000>;
}; };
q6_cdsp_dtb_mem: q6_cdsp_dtb_region@9f200000 { cdsp_mem: cdsp_region@98900000 {
no-map; no-map;
reg = <0x0 0x9f200000 0x0 0x80000>; reg = <0x0 0x98900000 0x0 0x1900000>;
}; };
q6_adsp_dtb_mem: q6_adsp_dtb_region@9f280000 { q6_cdsp_dtb_mem: q6_cdsp_dtb_region@9a200000 {
no-map; no-map;
reg = <0x0 0x9f280000 0x0 0x80000>; reg = <0x0 0x9a200000 0x0 0x80000>;
}; };
adspslpi_mem: adspslpi_region@9f300000 { q6_adsp_dtb_mem: q6_adsp_dtb_region@9a280000 {
no-map; no-map;
reg = <0x0 0x9f300000 0x0 0x4080000>; reg = <0x0 0x9a280000 0x0 0x80000>;
}; };
soccp_mem: soccp_region@a3380000 { adspslpi_mem: adspslpi_region@9a300000 {
no-map; no-map;
reg = <0x0 0xa3380000 0x0 0x180000>; reg = <0x0 0x9a300000 0x0 0x3a80000>;
};
wpss_mem: wpss_region@a3500000 {
no-map;
reg = <0x0 0xa3500000 0x0 0x1900000>;
}; };
wlan_msa_mem: wlan_msa_region@a6400000 { wlan_msa_mem: wlan_msa_region@a6400000 {
@@ -249,7 +239,7 @@
llcc_lpi_mem: llcc_lpi_region@ff800000 { llcc_lpi_mem: llcc_lpi_region@ff800000 {
no-map; no-map;
reg = <0x0 0xff800000 0x0 0x400000>; reg = <0x0 0xff800000 0x0 0x180000>;
}; };
}; };

View File

@@ -794,7 +794,7 @@
firmware-name = "modem.mdt", "modem_dtb.mdt"; firmware-name = "modem.mdt", "modem_dtb.mdt";
memory-region = <&mpss_mem &q6_mpss_dtb_mem &system_cma &dsm_partition_1_mem &dsm_partition_2_mem>; memory-region = <&mpss_mem &q6_mpss_dtb_mem &system_cma &dsm_partition_1_mem>;
/* Inputs from mss */ /* Inputs from mss */
interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,

View File

@@ -17,8 +17,13 @@
ranges; ranges;
dma-coherent; dma-coherent;
qcom,regulator-names = "vdd"; /*
vdd-supply = <&gpu_cc_cx_gdsc>; * When gdsc is enabled, and cpu enters cpuidle, DDR
* bandwidth vote must be present to prevent DDR
* shutdown.
*/
power-domains = <&gpucc GPU_CC_CX_SMMU_GDSC>;
interconnects = <&gem_noc MASTER_GPU_TCU &mc_virt SLAVE_EBI1>;
clocks = <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; clocks = <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
clock-names = clock-names =

View File

@@ -307,6 +307,10 @@
compatible = "qcom,smcinvoke"; compatible = "qcom,smcinvoke";
}; };
qcom_mem_object {
compatible = "qcom,mem-object";
};
qcom,qrtr { qcom,qrtr {
compatible = "qcom,qrtr"; compatible = "qcom,qrtr";
qcom,node-id = <21>; qcom,node-id = <21>;

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@@ -198,3 +198,13 @@
}; };
}; };
}; };
&pmih010x_eusb2_repeater {
vdd18-supply = <&L7B>;
vdd3-supply = <&L17B>;
};
&eusb2_phy0 {
dummy-supply = <&pmih010x_eusb2_repeater>;
usb-repeater = <&pmih010x_eusb2_repeater>;
};

View File

@@ -184,3 +184,13 @@
}; };
}; };
}; };
&pmiv010x_eusb2_repeater {
vdd18-supply = <&L7B>;
vdd3-supply = <&L17B>;
};
&eusb2_phy0 {
dummy-supply = <&pmiv010x_eusb2_repeater>;
usb-repeater = <&pmiv010x_eusb2_repeater>;
};

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@@ -40,6 +40,7 @@
qcom,use-pdc-interrupts; qcom,use-pdc-interrupts;
qcom,use-eusb2-phy; qcom,use-eusb2-phy;
qcom,dis-sending-cm-l1-quirk;
qcom,core-clk-rate = <200000000>; qcom,core-clk-rate = <200000000>;
qcom,core-clk-rate-hs = <66666667>; qcom,core-clk-rate-hs = <66666667>;
qcom,core-clk-rate-disconnected = <133333333>; qcom,core-clk-rate-disconnected = <133333333>;
@@ -58,6 +59,13 @@
0x144 /* GSI_RING_BASE_ADDR_H */ 0x144 /* GSI_RING_BASE_ADDR_H */
0x1a4>; /* GSI_IF_STS */ 0x1a4>; /* GSI_IF_STS */
/*
* Establish dependency on smmu driver so that depopulate path of
* deferred probe doesn't run into existing bug in smmu driver.
*/
dummy-supply = <&apps_smmu>;
dwc3_0: dwc3@a600000 { dwc3_0: dwc3@a600000 {
compatible = "snps,dwc3"; compatible = "snps,dwc3";
reg = <0x0 0xa600000 0x0 0xd93c>; reg = <0x0 0xa600000 0x0 0xd93c>;

View File

@@ -420,6 +420,10 @@
compatible = "qcom,smcinvoke"; compatible = "qcom,smcinvoke";
}; };
qcom_mem_object {
compatible = "qcom,mem-object";
};
qtee_shmbridge { qtee_shmbridge {
compatible = "qcom,tee-shared-memory-bridge"; compatible = "qcom,tee-shared-memory-bridge";
qcom,custom-bridge-size = <64>; qcom,custom-bridge-size = <64>;

View File

@@ -488,6 +488,10 @@
compatible = "qcom,smcinvoke"; compatible = "qcom,smcinvoke";
}; };
qcom_mem_object {
compatible = "qcom,mem-object";
};
qtee_shmbridge { qtee_shmbridge {
compatible = "qcom,tee-shared-memory-bridge"; compatible = "qcom,tee-shared-memory-bridge";
}; };
@@ -841,9 +845,9 @@
reg = <0xaf21000 0x6000>, <0xaf27000 0x400>, <0xaf27400 0x400>, reg = <0xaf21000 0x6000>, <0xaf27000 0x400>, <0xaf27400 0x400>,
<0xaf27800 0x2000>, <0xaf29800 0x700>, <0xaf29f00 0x100>; <0xaf27800 0x2000>, <0xaf29800 0x700>, <0xaf29f00 0x100>;
reg-names = "base", "crm_b", "crm_b_pt", "crm_c", "crm_v", "common"; reg-names = "base", "crm_b", "crm_b_pt", "crm_c", "crm_v", "common";
interrupts = <GIC_SPI 703 IRQ_TYPE_EDGE_RISING>, interrupts = <GIC_SPI 702 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 708 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 707 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 714 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 713 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 68 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 96 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 242 IRQ_TYPE_EDGE_RISING>; <GIC_SPI 242 IRQ_TYPE_EDGE_RISING>;
@@ -877,7 +881,7 @@
reg = <0x1d01000 0x2000>, <0x1d03000 0x400>, <0x1d03400 0x400>, reg = <0x1d01000 0x2000>, <0x1d03000 0x400>, <0x1d03400 0x400>,
<0x1d03800 0x2000>, <0x1d05800 0x700>, <0x1d05f00 0x100>; <0x1d03800 0x2000>, <0x1d05800 0x700>, <0x1d05f00 0x100>;
reg-names = "base", "crm_b", "crm_b_pt", "crm_c", "crm_v", "common"; reg-names = "base", "crm_b", "crm_b_pt", "crm_c", "crm_v", "common";
interrupts = <GIC_SPI 641 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 640 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "pcie_crm_drv0"; interrupt-names = "pcie_crm_drv0";
clocks = <&pcie_0_pipe_clk>; clocks = <&pcie_0_pipe_clk>;
qcom,hw-drv-ids = <0 1>; qcom,hw-drv-ids = <0 1>;