From 0f2864c72f729dd6cdaef0211d8d6fee6c79d42f Mon Sep 17 00:00:00 2001 From: Xubin Bai Date: Mon, 7 Aug 2023 05:15:51 -0700 Subject: [PATCH] ARM: dts: msm: Unstub Videocc for Sun Unstub Videocc for Sun. Change-Id: I0bdfbd02b8e321f02507214c6d0ec56e64911d8b Signed-off-by: Xubin Bai --- qcom/sun.dtsi | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi index 942ae0cb..feca30a2 100644 --- a/qcom/sun.dtsi +++ b/qcom/sun.dtsi @@ -646,8 +646,19 @@ }; videocc: clock-controller@aaf0000 { - compatible = "qcom,dummycc"; - clock-output-names = "videocc_clocks"; + compatible = "qcom,sun-videocc", "syscon"; + reg = <0xaaf0000 0x10000>; + reg-name = "cc_base"; + vdd_mm-supply = <&VDD_MM_LEVEL>; + vdd_mxc-supply = <&VDD_MXC_LEVEL>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>, + <&gcc GCC_VIDEO_AHB_CLK>; + clock-names = "bi_tcxo", + "bi_tcxo_ao", + "sleep_clk", + "iface"; #clock-cells = <1>; #reset-cells = <1>; }; @@ -842,14 +853,22 @@ /* VIDEO_CC GDSCs */ video_cc_mvs0_gdsc: qcom,gdsc@aaf8068 { - compatible = "qcom,stub-regulator"; + compatible = "qcom,gdsc"; + reg = <0xaaf8068 0x4>; regulator-name = "video_cc_mvs0_gdsc"; + parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>; + qcom,retain-regs; qcom,support-hw-trigger; + qcom,support-cfg-gdscr; }; video_cc_mvs0c_gdsc: qcom,gdsc@aaf8034 { - compatible = "qcom,stub-regulator"; + compatible = "qcom,gdsc"; + reg = <0xaaf8034 0x4>; regulator-name = "video_cc_mvs0c_gdsc"; + parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>; + qcom,retain-regs; + qcom,support-cfg-gdscr; }; psci {