From 5d9d8cec46189c74c07177d24765b84a3f75adb5 Mon Sep 17 00:00:00 2001 From: Yeshwanth Sriram Guntuka Date: Tue, 6 Feb 2024 15:59:30 +0530 Subject: [PATCH] ARM: dts: msm: Use shared iommu group for WLAN to support direct link Use shared iommu group for WLAN on sun to support direct link on Ganges. CRs-Fixed: 3714880 Change-Id: Id04d281542260c5ca07d104880dd2ec5a197f7f8 --- sun-peach-cnss-v8.dtsi | 17 ++--------------- sun-peach-cnss.dtsi | 17 ++--------------- 2 files changed, 4 insertions(+), 30 deletions(-) diff --git a/sun-peach-cnss-v8.dtsi b/sun-peach-cnss-v8.dtsi index 8d9a480c..071997af 100644 --- a/sun-peach-cnss-v8.dtsi +++ b/sun-peach-cnss-v8.dtsi @@ -133,28 +133,15 @@ }; &pcie0_rp { - cnss_pci0: cnss_pci0 { reg = <0 0 0 0 0>; - qcom,iommu-group = <&cnss_pci_iommu_group0>; + qcom,iommu-group = <&cnss_audio_iommu_group0>; memory-region = <&cnss_wlan_mem &cnss_pci0_iommu_region_partition>; - #address-cells = <1>; - #size-cells = <1>; - cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition { /* address-cells =3 size-cells=2 from sun-pcie.dtsi */ - iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0xa0000000>, + iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x88000000>, <&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>; }; - - cnss_pci_iommu_group0: cnss_pci_iommu_group0 { - qcom,iommu-msi-size = <0x1000>; - qcom,iommu-geometry = <0xa0000000 0x10010000>; - qcom,iommu-dma = "fastmap"; - qcom,iommu-pagetable = "coherent"; - qcom,iommu-faults = "stall-disable", "HUPCF", - "non-fatal"; - }; }; }; diff --git a/sun-peach-cnss.dtsi b/sun-peach-cnss.dtsi index 5b9a2536..bf259961 100644 --- a/sun-peach-cnss.dtsi +++ b/sun-peach-cnss.dtsi @@ -132,28 +132,15 @@ }; &pcie0_rp { - cnss_pci0: cnss_pci0 { reg = <0 0 0 0 0>; - qcom,iommu-group = <&cnss_pci_iommu_group0>; + qcom,iommu-group = <&cnss_audio_iommu_group0>; memory-region = <&cnss_wlan_mem &cnss_pci0_iommu_region_partition>; - #address-cells = <1>; - #size-cells = <1>; - cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition { /* address-cells =3 size-cells=2 from sun-pcie.dtsi */ - iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0xa0000000>, + iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x88000000>, <&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>; }; - - cnss_pci_iommu_group0: cnss_pci_iommu_group0 { - qcom,iommu-msi-size = <0x1000>; - qcom,iommu-geometry = <0xa0000000 0x10010000>; - qcom,iommu-dma = "fastmap"; - qcom,iommu-pagetable = "coherent"; - qcom,iommu-faults = "stall-disable", "HUPCF", - "non-fatal"; - }; }; };