diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi index dea5b1b6..f7493c22 100644 --- a/qcom/sun.dtsi +++ b/qcom/sun.dtsi @@ -18,6 +18,7 @@ #include #include #include +#include #include / { @@ -1444,6 +1445,248 @@ restrict-access; }; + adsp_pas: remoteproc-adsp@03000000 { + compatible = "qcom,sun-adsp-pas"; + reg = <0x03000000 0x10000>; + status = "ok"; + + cx-supply = <&VDD_LPI_CX_LEVEL>; + cx-uV-uA = ; + mx-supply = <&VDD_LPI_MX_LEVEL>; + mx-uV-uA = ; + reg-names = "cx", "mx"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + qcom,signal-aop; + qcom,qmp = <&aoss_qmp>; + + interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC &mc_virt SLAVE_EBI1>, + <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>; + interconnect-names = "rproc_ddr", "crypto_ddr"; + + firmware-name = "adsp.mdt", "adsp_dtb.mdt"; + + memory-region = <&adspslpi_mem &q6_adsp_dtb_mem>; + + /* Inputs from ssc */ + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 0>, + <&adsp_smp2p_in 2 0>, + <&adsp_smp2p_in 1 0>, + <&adsp_smp2p_in 3 0>; + + interrupt-names = "wdog", + "fatal", + "handover", + "ready", + "stop-ack"; + + /* Outputs to turing */ + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink_edge: glink-edge { + qcom,remote-pid = <2>; + transport = "smem"; + mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + mbox-names = "adsp_smem"; + interrupt-parent = <&ipcc_mproc>; + interrupts = ; + + label = "adsp"; + qcom,glink-label = "lpass"; + + qcom,adsp_qrtr { + qcom,glink-channels = "IPCRTR"; + qcom,net-id = <2>; + qcom,intents = <0x800 5 + 0x2000 3 + 0x4400 2>; + + qcom,no-wake-svc = <0x190>; + }; + + qcom,pmic_glink_rpmsg { + qcom,glink-channels = "PMIC_RTR_ADSP_APPS"; + }; + + qcom,pmic_glink_log_rpmsg { + qcom,glink-channels = "PMIC_LOGS_ADSP_APPS"; + qcom,intents = <0x800 5 + 0xc00 3 + 0x2000 1>; + }; + + qcom,msm_fastrpc_rpmsg { + compatible = "qcom,msm-fastrpc-rpmsg"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + }; + }; + }; + + modem_pas: remoteproc-mss@04080000 { + compatible = "qcom,sun-modem-pas"; + reg = <0x4080000 0x10000>; + status = "ok"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + cx-supply = <&VDD_CX_LEVEL>; + cx-uV-uA = ; + mx-supply = <&VDD_MODEM_LEVEL>; + mx-uV-uA = ; + reg-names = "cx", "mx"; + + qcom,signal-aop; + qcom,qmp = <&aoss_qmp>; + + interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, + <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>; + interconnect-names = "rproc_ddr", "crypto_ddr"; + + memory-region = <&mpss_mem &q6_mpss_dtb_mem &dsm_partition_1_mem &dsm_partition_2_mem>; + firmware-name = "modem.mdt", "modem_dtb.mdt"; + + /* Inputs from mss */ + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 0 0>, + <&modem_smp2p_in 2 0>, + <&modem_smp2p_in 1 0>, + <&modem_smp2p_in 3 0>, + <&modem_smp2p_in 7 0>; + + interrupt-names = "wdog", + "fatal", + "handover", + "ready", + "stop-ack", + "shutdown-ack"; + + /* Outputs to mss */ + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + qcom,remote-pid = <1>; + transport = "smem"; + mboxes = <&ipcc_mproc IPCC_CLIENT_MPSS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + mbox-names = "mpss_smem"; + interrupt-parent = <&ipcc_mproc>; + interrupts = ; + + label = "modem"; + qcom,glink-label = "mpss"; + + qcom,modem_qrtr { + qcom,glink-channels = "IPCRTR"; + qcom,low-latency; + qcom,intents = <0x800 5 + 0x2000 3 + 0x4400 2>; + }; + + qcom,modem_ds { + qcom,glink-channels = "DS"; + qcom,intents = <0x4000 0x2>; + }; + }; + }; + + cdsp_pas: remoteproc-cdsp@32300000 { + compatible = "qcom,sun-cdsp-pas"; + reg = <0x32300000 0x10000>; + status = "ok"; + + cx-supply = <&VDD_CX_LEVEL>; + cx-uV-uA = ; + mx-supply = <&VDD_MXC_LEVEL>; + mx-uV-uA = ; + nsp-supply = <&VDD_NSP1_LEVEL>; + nsp-uV-uA = ; + reg-names = "cx","mx","nsp"; + + firmware-name = "cdsp.mdt", "cdsp_dtb.mdt"; + memory-region = <&cdsp_mem &q6_cdsp_dtb_mem &global_sync_mem>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + qcom,signal-aop; + qcom,qmp = <&aoss_qmp>; + + interconnects = <&nsp_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>, + <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>; + interconnect-names = "rproc_ddr", "crypto_ddr"; + + /* Inputs from turing */ + interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>, + <&cdsp_smp2p_in 0 0>, + <&cdsp_smp2p_in 2 0>, + <&cdsp_smp2p_in 1 0>, + <&cdsp_smp2p_in 3 0>; + + interrupt-names = "wdog", + "fatal", + "handover", + "ready", + "stop-ack"; + + /* Outputs to turing */ + qcom,smem-states = <&cdsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + qcom,remote-pid = <5>; + transport = "smem"; + mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP + IPCC_MPROC_SIGNAL_GLINK_QMP>; + mbox-names = "cdsp_smem"; + interrupt-parent = <&ipcc_mproc>; + interrupts = ; + + label = "cdsp"; + qcom,glink-label = "cdsp"; + + qcom,cdsp_qrtr { + qcom,glink-channels = "IPCRTR"; + qcom,intents = <0x800 5 + 0x2000 3 + 0x4400 2>; + }; + + qcom,msm_cdsprm_rpmsg { + compatible = "qcom,msm-cdsprm-rpmsg"; + qcom,glink-channels = "cdsprmglink-apps-dsp"; + qcom,intents = <0x20 12>; + + msm_cdsp_rm: qcom,msm_cdsp_rm { + compatible = "qcom,msm-cdsp-rm"; + qcom,qos-cores = <0 1>; + qcom,qos-latency-us = <70>; + qcom,qos-maxhold-ms = <20>; + }; + }; + + qcom,msm_fastrpc_rpmsg { + compatible = "qcom,msm-fastrpc-rpmsg"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + }; + }; + }; + thermal_zones: thermal-zones { }; };