ARM: dts: msm: Add canoe target dts files
Add canoe target dts files Change-Id: Iffee5ea6e1679c564e29a560c715b9a3c5df3300 CRs-Fixed: 3922164
This commit is contained in:
Mohammed Ahmed
19
canoe-kiwi-cnss.dts
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19
canoe-kiwi-cnss.dts
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@@ -0,0 +1,19 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/dts-v1/;
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/plugin/;
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#include "canoe-kiwi-cnss.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Canoe SoCs";
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compatible = "qcom,canoe", "qcom,canoep", "qcom,canoe-mtp", "qcom,canoe-cdp";
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qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>,
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<0x100026a 0x10000>, <0x100026a 0x20000>,
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<0x100027f 0x10000>, <0x100027f 0x20000>;
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qcom,board-id = <0x20001 0>, <0x20008 0>, <0x40015 0>;
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};
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225
canoe-kiwi-cnss.dtsi
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225
canoe-kiwi-cnss.dtsi
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@@ -0,0 +1,225 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/interconnect/qcom,canoe.h>
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&tlmm {
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cnss_pins {
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cnss_wlan_en_active: cnss_wlan_en_active {
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mux {
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pins = "gpio16";
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function = "gpio";
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};
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config {
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pins = "gpio16";
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drive-strength = <16>;
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output-high;
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bias-pull-up;
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};
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};
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cnss_wlan_en_sleep: cnss_wlan_en_sleep {
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mux {
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pins = "gpio16";
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function = "gpio";
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};
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config {
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pins = "gpio16";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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};
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cnss_wlan_sw_ctrl: cnss_wlan_sw_ctrl {
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mux {
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pins = "gpio18";
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function = "wcn_sw_ctrl";
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};
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};
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cnss_wlan_sw_ctrl_wl_cx: cnss_wlan_sw_ctrl_wl_cx {
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mux {
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pins = "gpio19";
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function = "wcn_sw";
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};
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};
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};
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};
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&reserved_memory {
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cnss_wlan_mem: cnss_wlan_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x2000000>;
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};
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};
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&soc {
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wlan_kiwi: qcom,cnss-kiwi@b0000000 {
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compatible = "qcom,cnss-kiwi";
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reg = <0xb0000000 0x10000>;
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reg-names = "smmu_iova_ipa";
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qcom,wlan-sw-ctrl-gpio = <&tlmm 19 0>;
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supported-ids = <0x1107>;
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wlan-en-gpio = <&tlmm 16 0>;
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qcom,bt-en-gpio = <&pm8550vs_f_gpios 3 0>;
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qcom,sw-ctrl-gpio = <&tlmm 18 0>;
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/* List of GPIOs to be setup for interrupt wakeup capable */
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mpm_wake_set_gpios = <18 19>;
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pinctrl-names = "wlan_en_active", "wlan_en_sleep", "sw_ctrl",
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"sw_ctrl_wl_cx";
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pinctrl-0 = <&cnss_wlan_en_active>;
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pinctrl-1 = <&cnss_wlan_en_sleep>;
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pinctrl-2 = <&cnss_wlan_sw_ctrl>;
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pinctrl-3 = <&cnss_wlan_sw_ctrl_wl_cx>;
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qcom,wlan;
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qcom,wlan-rc-num = <0>;
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qcom,wlan-ramdump-dynamic = <0x780000>;
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cnss-enable-self-recovery;
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qcom,wlan-cbc-enabled;
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use-pm-domain;
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qcom,same-dt-multi-dev;
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/* For AOP communication, use direct QMP instead of mailbox */
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qcom,qmp = <&aoss_qmp>;
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vdd-wlan-io-supply = <&L3F>;
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qcom,vdd-wlan-io-config = <1800000 1800000 30000 0 1>;
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vdd-wlan-io12-supply = <&L2F>;
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qcom,vdd-wlan-io12-config = <1200000 1200000 30000 0 1>;
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vdd-wlan-supply = <&S4J>;
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qcom,vdd-wlan-config = <932000 1000000 0 0 0>;
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vdd-wlan-aon-supply = <&S4D>;
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qcom,vdd-wlan-aon-config = <976000 1036000 0 0 1>;
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vdd-wlan-dig-supply = <&S1D>;
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qcom,vdd-wlan-dig-config = <916000 1100000 0 0 1>;
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vdd-wlan-rfa1-supply = <&S3G>;
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qcom,vdd-wlan-rfa1-config = <1864000 2000000 0 0 1>;
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vdd-wlan-rfa2-supply = <&S7I>;
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qcom,vdd-wlan-rfa2-config = <1316000 1340000 0 0 1>;
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vdd-wlan-ant-share-supply = <&L6K>;
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qcom,vdd-wlan-ant-share-config = <1800000 1800000 0 0 1>;
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interconnects =
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<&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>,
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<&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>;
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interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";
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qcom,icc-path-count = <2>;
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qcom,bus-bw-cfg-count = <9>;
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qcom,bus-bw-cfg =
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/** ICC Path 1 **/
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<0 0>, /* no vote */
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/* idle: 0-18 Mbps snoc/anoc: 100 Mhz */
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<2250 800000>,
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/* low: 18-60 Mbps snoc/anoc: 100 Mhz */
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<7500 800000>,
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/* medium: 60-240 Mbps snoc/anoc: 100 Mhz */
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<30000 800000>,
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/* high: 240-1200 Mbps snoc/anoc: 100 Mhz */
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<100000 800000>,
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/* very high: > 1200 Mbps snoc/anoc: 403 Mhz */
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<175000 3224000>,
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/* ultra high: DBS mode snoc/anoc: 403 Mhz */
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<312500 3224000>,
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/* super high: DBS mode snoc/anoc: 533 Mhz */
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<587500 4264000>,
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/* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */
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<7500 1600000>,
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/** ICC Path 2 **/
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<0 0>,
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/* idle: 0-18 Mbps ddr: 547.2 MHz */
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<2250 2188800>,
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/* low: 18-60 Mbps ddr: 547.2 MHz */
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<7500 2188800>,
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/* medium: 60-240 Mbps ddr: 547.2 MHz */
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<30000 2188800>,
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/* high: 240-1200 Mbps ddr: 547.2 MHz */
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<100000 2188800>,
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/* very high: > 1200 Mbps ddr: 1555 MHz */
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<175000 6220800>,
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/* ultra high: DBS mode ddr: 2092 MHz */
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<312500 8368000>,
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/* super high: DBS mode ddr: 3.2 GHz */
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<587500 12800000>,
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/* low (latency critical): 18-60 Mbps ddr: 547.2 MHz */
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<7500 2188800>;
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qcom,vreg_pdc_map =
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"s4j", "bb",
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"s4d", "bb",
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"s3g", "rf",
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"s7i", "rf",
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"s1d", "rf";
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qcom,pmu_vreg_map =
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"VDD095_MX_PMU", "s4d",
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"VDD095_PMU", "s4j",
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"VDD_PMU_AON_I", "s1d",
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"VDD095_PMU_BT", "s1d",
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"VDD09_PMU_RFA_I", "s1d",
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"VDD13_PMU_PCIE_I", "s7i",
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"VDD13_PMU_RFA_I", "s7i",
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"VDD19_PMU_PCIE_I", "s3g",
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"VDD19_PMU_RFA_I", "s3g";
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qcom,pdc_init_table =
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"{class: wlan_pdc, ss: rf, res: s3g.v, upval: 1856}",
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"{class: wlan_pdc, ss: rf, res: s3g.v, dwnval: 1844}",
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"{class: wlan_pdc, ss: rf, res: s7i.v, upval: 1316}",
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"{class: wlan_pdc, ss: rf, res: s7i.v, dwnval: 972}",
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"{class: wlan_pdc, ss: rf, res: s1d.m, enable: 1}",
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"{class: wlan_pdc, ss: rf, res: s1d.v, enable: 1}",
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"{class: wlan_pdc, ss: rf, res: s1d.v, upval: 916}",
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"{class: wlan_pdc, ss: rf, res: s1d.v, dwnval: 880}",
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"{class: wlan_pdc, ss: rf, res: s4j.m, enable: 0}",
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"{class: wlan_pdc, ss: rf, res: s4j.v, enable: 0}",
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"{class: wlan_pdc, ss: bb, res: s4d.v, upval: 976}",
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"{class: wlan_pdc, ss: bb, res: s4d.v, dwnval: 536}",
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"{class: wlan_pdc, ss: bb, res: s4j.m, enable: 1}",
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"{class: wlan_pdc, ss: bb, res: s4j.v, enable: 1}",
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"{class: wlan_pdc, ss: bb, res: s4j.v, upval: 932}",
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"{class: wlan_pdc, ss: bb, res: s4j.v, dwnval: 444}";
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/* cpu mask used for wlan tx rx interrupt affinity
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* <cpumask_for_rx_interrupts cpumask_for_tx_comp_interrupts>
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*/
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wlan-txrx-intr-cpumask = <0x3 0x30>;
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};
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};
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&pcie0_rp {
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cnss_pci0: cnss_pci0 {
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reg = <0 0 0 0 0>;
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qcom,iommu-group = <&cnss_pci_iommu_group0>;
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memory-region = <&cnss_wlan_mem &cnss_pci0_iommu_region_partition>;
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#address-cells = <1>;
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#size-cells = <1>;
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cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition {
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/* address-cells =3 size-cells=2 from sun-pcie.dtsi */
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iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x98000000>,
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<&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>;
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};
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cnss_pci_iommu_group0: cnss_pci_iommu_group0 {
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qcom,iommu-msi-size = <0x1000>;
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qcom,iommu-geometry = <0x98000000 0x18010000>;
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qcom,iommu-dma = "fastmap";
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qcom,iommu-pagetable = "coherent";
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qcom,iommu-faults = "stall-disable", "HUPCF",
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"non-fatal";
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};
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};
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};
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20
canoe-peach-cnss.dts
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20
canoe-peach-cnss.dts
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@@ -0,0 +1,20 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/dts-v1/;
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/plugin/;
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#include "canoe-peach-cnss.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Sun SoCs";
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compatible = "qcom,canoe", "qcom,canoep";
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qcom,msm-id = <618 0x10000>, <618 0x20000>,
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<639 0x10000>, <639 0x20000>,
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<0x100026a 0x10000>, <0x100026a 0x20000>,
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<0x100027f 0x10000>, <0x100027f 0x20000>;
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qcom,board-id = <1 0>, <8 0>, <0x1000B 0>, <0x15 0>;
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};
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215
canoe-peach-cnss.dtsi
Normal file
215
canoe-peach-cnss.dtsi
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@@ -0,0 +1,215 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/interconnect/qcom,canoe.h>
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&tlmm {
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cnss_pins {
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cnss_wlan_en_active: cnss_wlan_en_active {
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mux {
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pins = "gpio16";
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function = "gpio";
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};
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config {
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pins = "gpio16";
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drive-strength = <16>;
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output-high;
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bias-pull-up;
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};
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};
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cnss_wlan_en_sleep: cnss_wlan_en_sleep {
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mux {
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pins = "gpio16";
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function = "gpio";
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};
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config {
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pins = "gpio16";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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};
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cnss_wlan_sw_ctrl: cnss_wlan_sw_ctrl {
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mux {
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pins = "gpio18";
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function = "wcn_sw_ctrl";
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};
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};
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cnss_wlan_sw_ctrl_wl_cx: cnss_wlan_sw_ctrl_wl_cx {
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mux {
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pins = "gpio19";
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function = "wcn_sw";
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};
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};
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cnss_host_sol_default: cnss_host_sol_default {
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mux {
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pins = "gpio202";
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function = "gpio";
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};
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config {
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pins = "gpio202";
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drive-strength = <4>;
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bias-pull-down;
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};
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};
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};
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};
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&reserved_memory {
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cnss_wlan_mem: cnss_wlan_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x2000000>;
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};
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};
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&soc {
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wlan_peach: qcom,cnss-peach@b0000000 {
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compatible = "qcom,cnss-peach";
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reg = <0xb0000000 0x10000>;
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reg-names = "smmu_iova_ipa";
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qcom,wlan-sw-ctrl-gpio = <&tlmm 19 0>;
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supported-ids = <0x110E>;
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wlan-en-gpio = <&tlmm 16 0>;
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qcom,bt-en-gpio = <&pm8550vs_f_gpios 3 0>;
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qcom,sw-ctrl-gpio = <&tlmm 18 0>;
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wlan-host-sol-gpio = <&tlmm 202 0>;
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wlan-dev-sol-gpio = <&tlmm 203 0>;
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/* List of GPIOs to be setup for interrupt wakeup capable */
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mpm_wake_set_gpios = <18 19>;
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pinctrl-names = "wlan_en_active", "wlan_en_sleep", "sw_ctrl",
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"sw_ctrl_wl_cx", "sol_default";
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pinctrl-0 = <&cnss_wlan_en_active>;
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pinctrl-1 = <&cnss_wlan_en_sleep>;
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pinctrl-2 = <&cnss_wlan_sw_ctrl>;
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pinctrl-3 = <&cnss_wlan_sw_ctrl_wl_cx>;
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pinctrl-4 = <&cnss_host_sol_default>;
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qcom,wlan;
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qcom,wlan-rc-num = <0>;
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qcom,wlan-ramdump-dynamic = <0x780000>;
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cnss-enable-self-recovery;
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qcom,wlan-cbc-enabled;
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use-pm-domain;
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qcom,same-dt-multi-dev;
|
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/* For AOP communication, use direct QMP instead of mailbox */
|
||||
qcom,qmp = <&aoss_qmp>;
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msix-match-addr = <0x3000>;
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vdd-wlan-io-supply = <&L3F>;
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qcom,vdd-wlan-io-config = <1800000 1800000 30000 0 1>;
|
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vdd-wlan-io12-supply = <&L2F>;
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qcom,vdd-wlan-io12-config = <1200000 1200000 30000 0 1>;
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vdd-wlan-aon-supply = <&S4D>;
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qcom,vdd-wlan-aon-config = <876000 1036000 0 0 1>;
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vdd-wlan-dig-supply = <&S4J>;
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qcom,vdd-wlan-dig-config = <876000 1000000 0 0 1>;
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vdd-wlan-rfa1-supply = <&S3G>;
|
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qcom,vdd-wlan-rfa1-config = <1860000 2000000 0 0 1>;
|
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vdd-wlan-rfa2-supply = <&S7I>;
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qcom,vdd-wlan-rfa2-config = <1312000 1340000 0 0 1>;
|
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vdd-wlan-ant-share-supply = <&L6K>;
|
||||
qcom,vdd-wlan-ant-share-config = <1800000 1860000 0 0 1>;
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|
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interconnects =
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<&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>,
|
||||
<&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>;
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interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";
|
||||
|
||||
qcom,icc-path-count = <2>;
|
||||
qcom,bus-bw-cfg-count = <9>;
|
||||
qcom,bus-bw-cfg =
|
||||
/** ICC Path 1 **/
|
||||
<0 0>, /* no vote */
|
||||
/* idle: 0-18 Mbps snoc/anoc: 100 Mhz */
|
||||
<2250 800000>,
|
||||
/* low: 18-60 Mbps snoc/anoc: 100 Mhz */
|
||||
<7500 800000>,
|
||||
/* medium: 60-240 Mbps snoc/anoc: 100 Mhz */
|
||||
<30000 800000>,
|
||||
/* high: 240-1200 Mbps snoc/anoc: 100 Mhz */
|
||||
<100000 800000>,
|
||||
/* very high: > 1200 Mbps snoc/anoc: 403 Mhz */
|
||||
<175000 3224000>,
|
||||
/* ultra high: DBS mode snoc/anoc: 403 Mhz */
|
||||
<312500 3224000>,
|
||||
/* super high: DBS mode snoc/anoc: 533 Mhz */
|
||||
<587500 4264000>,
|
||||
/* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */
|
||||
<7500 1600000>,
|
||||
|
||||
/** ICC Path 2 **/
|
||||
<0 0>,
|
||||
/* idle: 0-18 Mbps ddr: 547.2 MHz */
|
||||
<2250 2188800>,
|
||||
/* low: 18-60 Mbps ddr: 547.2 MHz */
|
||||
<7500 2188800>,
|
||||
/* medium: 60-240 Mbps ddr: 547.2 MHz */
|
||||
<30000 2188800>,
|
||||
/* high: 240-1200 Mbps ddr: 547.2 MHz */
|
||||
<100000 2188800>,
|
||||
/* very high: > 1200 Mbps ddr: 1555 MHz */
|
||||
<175000 6220800>,
|
||||
/* ultra high: DBS mode ddr: 2092 MHz */
|
||||
<312500 8368000>,
|
||||
/* super high: DBS mode ddr: 3.2 GHz */
|
||||
<587500 12800000>,
|
||||
/* low (latency critical): 18-60 Mbps ddr: 547.2 MHz */
|
||||
<7500 2188800>;
|
||||
|
||||
qcom,vreg_pdc_map =
|
||||
"s4j", "rf",
|
||||
"s4d", "bb",
|
||||
"s3g", "rf",
|
||||
"s7i", "rf";
|
||||
|
||||
qcom,pmu_vreg_map =
|
||||
"VDDD_AON_0P9", "s4j",
|
||||
"VDDA_RFA_1P9", "s3g",
|
||||
"VDDA_RFA_1P3", "s7i",
|
||||
"VDDA_RFA_0P9", "s4j",
|
||||
"VDDD_WLMX_0P9", "s4d",
|
||||
"VDDD_WLCX_0P9", "s4j",
|
||||
"VDDD_BTCX_0P9", "s4j",
|
||||
"VDDD_BTCMX_0P9", "s4j",
|
||||
"VDDA_PCIE_1P2", "s7i",
|
||||
"VDDA_PCIE_0P9", "s7i";
|
||||
|
||||
qcom,pdc_init_table =
|
||||
"{class: wlan_pdc, ss: rf, res: s4j.m, enable: 1}",
|
||||
"{class: wlan_pdc, ss: rf, res: s4j.v, enable: 1}",
|
||||
"{class: wlan_pdc, ss: rf, res: s4j.v, upval: 876}",
|
||||
"{class: wlan_pdc, ss: rf, res: s4j.v, dwnval: 876}";
|
||||
|
||||
/* cpu mask used for wlan tx rx interrupt affinity
|
||||
* <cpumask_for_rx_interrupts cpumask_for_tx_comp_interrupts>
|
||||
*/
|
||||
wlan-txrx-intr-cpumask = <0x3 0x30>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0_rp {
|
||||
cnss_pci0: cnss_pci0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
qcom,iommu-group = <&cnss_audio_iommu_group0>;
|
||||
memory-region = <&cnss_wlan_mem &cnss_pci0_iommu_region_partition>;
|
||||
|
||||
cnss_pci0_iommu_region_partition: cnss_pci0_iommu_region_partition {
|
||||
/* address-cells =3 size-cells=2 from sun-pcie.dtsi */
|
||||
iommu-addresses = <&cnss_pci0 0x0 0x0 0x0 0x0 0x18000000>,
|
||||
<&cnss_pci0 0x0 0x0 0xB0000000 0x0 0x50000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user