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Merge 3002a1df89 on remote branch

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Change-Id: Iec1dddb6637b59b7e360e060946d5ec699312566
This commit is contained in:
Linux Build Service Account
2024-03-18 23:54:44 -07:00
parent 048cbd8728 3002a1df89
commit 05512b9825
4 changed files with 149 additions and 76 deletions
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2
sun-camera-sensor-cdp.dts
View File

@@ -13,5 +13,5 @@
model = "Qualcomm Technologies, Inc. Sun CDP/RCM"; model = "Qualcomm Technologies, Inc. Sun CDP/RCM";
compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp", "qcom,rcm", "qcom,sun-rcm"; compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp", "qcom,rcm", "qcom,sun-rcm";
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
qcom,board-id = <1 0>, <21 0>, <0x20001 0>, <0x50001 0>, <0x60001 0>; qcom,board-id = <1 0>, <21 0>, <0x20001 0>, <0x30001 0>, <0x40001 0>, <0x50001 0>, <0x60001 0>, <0x30015 0>, <0x40015 0>, <0x20015 0>;
}; };

2
sun-camera-sensor-mtp.dts
View File

@@ -13,5 +13,5 @@
model = "Qualcomm Technologies, Inc. Sun MTP"; model = "Qualcomm Technologies, Inc. Sun MTP";
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp"; compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp";
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
qcom,board-id = <8 0>, <0x20008 0>, <0x40008 0>, <0x50008 0>; qcom,board-id = <8 0>, <0x10108 0>, <0x20008 0>, <0x30008 0>, <0x40008 0>, <0x40108 0>, <0x50008 0>, <0x60008 0>;
}; };

88
sun-camera.dtsi
View File

@@ -897,8 +897,9 @@
<&camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, <&camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
<&camcc CAM_CC_CSI0PHYTIMER_CLK>; <&camcc CAM_CC_CSI0PHYTIMER_CLK>;
src-clock-name = "cphy_rx_clk_src"; src-clock-name = "cphy_rx_clk_src";
clock-cntl-level = "lowsvs", "nominal"; clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
clock-rates = clock-rates =
<266666667 0 400000000 0>,
<400000000 0 400000000 0>, <400000000 0 400000000 0>,
<480000000 0 400000000 0>; <480000000 0 400000000 0>;
status = "ok"; status = "ok";
@@ -930,8 +931,9 @@
<&camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, <&camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>,
<&camcc CAM_CC_CSI1PHYTIMER_CLK>; <&camcc CAM_CC_CSI1PHYTIMER_CLK>;
src-clock-name = "cphy_rx_clk_src"; src-clock-name = "cphy_rx_clk_src";
clock-cntl-level = "lowsvs", "nominal"; clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
clock-rates = clock-rates =
<266666667 0 400000000 0>,
<400000000 0 400000000 0>, <400000000 0 400000000 0>,
<480000000 0 400000000 0>; <480000000 0 400000000 0>;
status = "ok"; status = "ok";
@@ -963,8 +965,9 @@
<&camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, <&camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,
<&camcc CAM_CC_CSI2PHYTIMER_CLK>; <&camcc CAM_CC_CSI2PHYTIMER_CLK>;
src-clock-name = "cphy_rx_clk_src"; src-clock-name = "cphy_rx_clk_src";
clock-cntl-level = "lowsvs", "nominal"; clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
clock-rates = clock-rates =
<266666667 0 400000000 0>,
<400000000 0 400000000 0>, <400000000 0 400000000 0>,
<480000000 0 400000000 0>; <480000000 0 400000000 0>;
status = "ok"; status = "ok";
@@ -996,8 +999,9 @@
<&camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, <&camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>,
<&camcc CAM_CC_CSI3PHYTIMER_CLK>; <&camcc CAM_CC_CSI3PHYTIMER_CLK>;
src-clock-name = "cphy_rx_clk_src"; src-clock-name = "cphy_rx_clk_src";
clock-cntl-level = "lowsvs", "nominal"; clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
clock-rates = clock-rates =
<266666667 0 400000000 0>,
<400000000 0 400000000 0>, <400000000 0 400000000 0>,
<480000000 0 400000000 0>; <480000000 0 400000000 0>;
status = "ok"; status = "ok";
@@ -1029,8 +1033,9 @@
<&camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>, <&camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>,
<&camcc CAM_CC_CSI4PHYTIMER_CLK>; <&camcc CAM_CC_CSI4PHYTIMER_CLK>;
src-clock-name = "cphy_rx_clk_src"; src-clock-name = "cphy_rx_clk_src";
clock-cntl-level = "lowsvs", "nominal"; clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
clock-rates = clock-rates =
<266666667 0 400000000 0>,
<400000000 0 400000000 0>, <400000000 0 400000000 0>,
<480000000 0 400000000 0>; <480000000 0 400000000 0>;
status = "ok"; status = "ok";
@@ -1062,8 +1067,9 @@
<&camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>, <&camcc CAM_CC_CSI5PHYTIMER_CLK_SRC>,
<&camcc CAM_CC_CSI5PHYTIMER_CLK>; <&camcc CAM_CC_CSI5PHYTIMER_CLK>;
src-clock-name = "cphy_rx_clk_src"; src-clock-name = "cphy_rx_clk_src";
clock-cntl-level = "lowsvs", "nominal"; clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
clock-rates = clock-rates =
<266666667 0 400000000 0>,
<400000000 0 400000000 0>, <400000000 0 400000000 0>,
<480000000 0 400000000 0>; <480000000 0 400000000 0>;
status = "ok"; status = "ok";
@@ -1083,8 +1089,8 @@
"cci_0_clk"; "cci_0_clk";
clocks = <&camcc CAM_CC_CCI_0_CLK_SRC>, clocks = <&camcc CAM_CC_CCI_0_CLK_SRC>,
<&camcc CAM_CC_CCI_0_CLK>; <&camcc CAM_CC_CCI_0_CLK>;
clock-rates = <37500000 0>; clock-rates = <37500000 0>, <37500000 0>;
clock-cntl-level = "lowsvs"; clock-cntl-level = "lowsvsd1", "lowsvs";
src-clock-name = "cci_0_clk_src"; src-clock-name = "cci_0_clk_src";
pctrl-idx-mapping = <CCI_MASTER_0 CCI_MASTER_1>; pctrl-idx-mapping = <CCI_MASTER_0 CCI_MASTER_1>;
pctrl-map-names = "m0", "m1"; pctrl-map-names = "m0", "m1";
@@ -1171,8 +1177,8 @@
"cci_1_clk"; "cci_1_clk";
clocks = <&camcc CAM_CC_CCI_1_CLK_SRC>, clocks = <&camcc CAM_CC_CCI_1_CLK_SRC>,
<&camcc CAM_CC_CCI_1_CLK>; <&camcc CAM_CC_CCI_1_CLK>;
clock-rates = <37500000 0>; clock-rates = <37500000 0>, <37500000 0>;
clock-cntl-level = "lowsvs"; clock-cntl-level = "lowsvsd1", "lowsvs";
src-clock-name = "cci_1_clk_src"; src-clock-name = "cci_1_clk_src";
pctrl-idx-mapping = <CCI_MASTER_0 CCI_MASTER_1>; pctrl-idx-mapping = <CCI_MASTER_0 CCI_MASTER_1>;
pctrl-map-names = "m0", "m1"; pctrl-map-names = "m0", "m1";
@@ -1259,8 +1265,8 @@
"cci_2_clk"; "cci_2_clk";
clocks = <&camcc CAM_CC_CCI_2_CLK_SRC>, clocks = <&camcc CAM_CC_CCI_2_CLK_SRC>,
<&camcc CAM_CC_CCI_2_CLK>; <&camcc CAM_CC_CCI_2_CLK>;
clock-rates = <37500000 0>; clock-rates = <37500000 0>, <37500000 0>;
clock-cntl-level = "lowsvs"; clock-cntl-level = "lowsvsd1", "lowsvs";
src-clock-name = "cci_2_clk_src"; src-clock-name = "cci_2_clk_src";
pctrl-idx-mapping = <CCI_MASTER_0 CCI_MASTER_1>; pctrl-idx-mapping = <CCI_MASTER_0 CCI_MASTER_1>;
pctrl-map-names = "m0", "m1"; pctrl-map-names = "m0", "m1";
@@ -1647,14 +1653,15 @@
<&camcc CAM_CC_QDSS_DEBUG_XO_CLK>; <&camcc CAM_CC_QDSS_DEBUG_XO_CLK>;
clock-rates = clock-rates =
<0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>,
<0 0 0 56470588 0 0 0 213333333 0 200000000 0 0 0 0 0>,
<0 0 0 80000000 0 0 0 300000000 0 300000000 0 0 0 0 0>, <0 0 0 80000000 0 0 0 300000000 0 300000000 0 0 0 0 0>,
<0 0 0 80000000 0 0 0 300000000 0 400000000 0 0 0 0 0>, <0 0 0 80000000 0 0 0 300000000 0 400000000 0 0 0 0 0>,
<0 0 0 80000000 0 0 0 300000000 0 400000000 0 0 0 0 0>, <0 0 0 80000000 0 0 0 300000000 0 400000000 0 0 0 0 0>,
<0 0 0 80000000 0 0 0 400000000 0 400000000 0 0 0 0 0>, <0 0 0 80000000 0 0 0 400000000 0 400000000 0 0 0 0 0>,
<0 0 0 80000000 0 0 0 400000000 0 400000000 0 0 0 0 0>, <0 0 0 80000000 0 0 0 400000000 0 400000000 0 0 0 0 0>,
<0 0 0 80000000 0 0 0 400000000 0 400000000 0 0 0 0 0>; <0 0 0 80000000 0 0 0 400000000 0 400000000 0 0 0 0 0>;
clock-cntl-level = "suspend", "lowsvs", "svs", "svs_l1", clock-cntl-level = "suspend", "lowsvsd1", "lowsvs", "svs",
"nominal", "nominal_l1", "turbo"; "svs_l1", "nominal", "nominal_l1", "turbo";
src-clock-name = "camnoc_rt_axi_clk_src"; src-clock-name = "camnoc_rt_axi_clk_src";
domain-id-support-clks = "ife_lite_csid_clk", domain-id-support-clks = "ife_lite_csid_clk",
"ife_lite_ahb", "csid_clk_src", "csid_clk"; "ife_lite_ahb", "csid_clk_src", "csid_clk";
@@ -1726,6 +1733,7 @@
sys-cache-uids = <71 72 73 74 75>; sys-cache-uids = <71 72 73 74 75>;
sys-cache-concur = <1 1 1 0 0>; sys-cache-concur = <1 1 1 0 0>;
enable-smart-qos; enable-smart-qos;
enable-cam-drv = <(CAM_DDR_DRV | CAM_CLK_DRV)>;
rt-wr-priority-min = <4>; rt-wr-priority-min = <4>;
rt-wr-priority-max = <5>; rt-wr-priority-max = <5>;
rt-wr-priority-clamp = <6>; rt-wr-priority-clamp = <6>;
@@ -2620,13 +2628,14 @@
<&camcc CAM_CC_CSID_CLK>, <&camcc CAM_CC_CSID_CLK>,
<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>; <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>;
clock-rates = clock-rates =
<266666667 0 0>,
<400000000 0 0>, <400000000 0 0>,
<480000000 0 0>, <480000000 0 0>,
<480000000 0 0>, <480000000 0 0>,
<480000000 0 0>, <480000000 0 0>,
<480000000 0 0>; <480000000 0 0>;
clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
"turbo"; "svs_l1", "nominal", "turbo";
src-clock-name = "csid_clk_src"; src-clock-name = "csid_clk_src";
clock-control-debugfs = "true"; clock-control-debugfs = "true";
status = "ok"; status = "ok";
@@ -2662,7 +2671,7 @@
<&camcc CAM_CC_TFE_0_BAYER_CLK>, <&camcc CAM_CC_TFE_0_BAYER_CLK>,
<&camcc CAM_CC_CAMNOC_RT_TFE_0_BAYER_CLK>; <&camcc CAM_CC_CAMNOC_RT_TFE_0_BAYER_CLK>;
clock-rates = clock-rates =
<0 360000000 0 0 0 0 0>, <0 360280000 0 0 0 0 0>,
<0 480000000 0 0 0 0 0>, <0 480000000 0 0 0 0 0>,
<0 630000000 0 0 0 0 0>, <0 630000000 0 0 0 0 0>,
<0 716000000 0 0 0 0 0>, <0 716000000 0 0 0 0 0>,
@@ -2698,13 +2707,14 @@
<&camcc CAM_CC_CSID_CLK>, <&camcc CAM_CC_CSID_CLK>,
<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>; <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>;
clock-rates = clock-rates =
<266666667 0 0>,
<400000000 0 0>, <400000000 0 0>,
<480000000 0 0>, <480000000 0 0>,
<480000000 0 0>, <480000000 0 0>,
<480000000 0 0>, <480000000 0 0>,
<480000000 0 0>; <480000000 0 0>;
clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
"turbo"; "svs_l1", "nominal", "turbo";
src-clock-name = "csid_clk_src"; src-clock-name = "csid_clk_src";
clock-control-debugfs = "true"; clock-control-debugfs = "true";
status = "ok"; status = "ok";
@@ -2740,7 +2750,7 @@
<&camcc CAM_CC_TFE_1_BAYER_CLK>, <&camcc CAM_CC_TFE_1_BAYER_CLK>,
<&camcc CAM_CC_CAMNOC_RT_TFE_1_BAYER_CLK>; <&camcc CAM_CC_CAMNOC_RT_TFE_1_BAYER_CLK>;
clock-rates = clock-rates =
<0 360000000 0 0 0 0 0>, <0 360280000 0 0 0 0 0>,
<0 480000000 0 0 0 0 0>, <0 480000000 0 0 0 0 0>,
<0 630000000 0 0 0 0 0>, <0 630000000 0 0 0 0 0>,
<0 716000000 0 0 0 0 0>, <0 716000000 0 0 0 0 0>,
@@ -2776,13 +2786,14 @@
<&camcc CAM_CC_CSID_CLK>, <&camcc CAM_CC_CSID_CLK>,
<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>; <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>;
clock-rates = clock-rates =
<266666667 0 0>,
<400000000 0 0>, <400000000 0 0>,
<480000000 0 0>, <480000000 0 0>,
<480000000 0 0>, <480000000 0 0>,
<480000000 0 0>, <480000000 0 0>,
<480000000 0 0>; <480000000 0 0>;
clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
"turbo"; "svs_l1", "nominal", "turbo";
src-clock-name = "csid_clk_src"; src-clock-name = "csid_clk_src";
clock-control-debugfs = "true"; clock-control-debugfs = "true";
status = "ok"; status = "ok";
@@ -2818,7 +2829,7 @@
<&camcc CAM_CC_TFE_2_BAYER_CLK>, <&camcc CAM_CC_TFE_2_BAYER_CLK>,
<&camcc CAM_CC_CAMNOC_RT_TFE_2_BAYER_CLK>; <&camcc CAM_CC_CAMNOC_RT_TFE_2_BAYER_CLK>;
clock-rates = clock-rates =
<0 360000000 0 0 0 0 0>, <0 360280000 0 0 0 0 0>,
<0 480000000 0 0 0 0 0>, <0 480000000 0 0 0 0 0>,
<0 630000000 0 0 0 0 0>, <0 630000000 0 0 0 0 0>,
<0 716000000 0 0 0 0 0>, <0 716000000 0 0 0 0 0>,
@@ -2860,13 +2871,14 @@
<&camcc CAM_CC_IFE_LITE_CLK>, <&camcc CAM_CC_IFE_LITE_CLK>,
<&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>; <&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>;
clock-rates = clock-rates =
<0 266666667 0 0 0 0>,
<0 400000000 0 0 0 0>, <0 400000000 0 0 0 0>,
<0 480000000 0 0 0 0>, <0 480000000 0 0 0 0>,
<0 480000000 0 0 0 0>, <0 480000000 0 0 0 0>,
<0 480000000 0 0 0 0>, <0 480000000 0 0 0 0>,
<0 480000000 0 0 0 0>; <0 480000000 0 0 0 0>;
clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
"turbo"; "svs_l1", "nominal", "turbo";
src-clock-name = "ife_lite_csid_clk_src"; src-clock-name = "ife_lite_csid_clk_src";
clock-control-debugfs = "true"; clock-control-debugfs = "true";
status = "ok"; status = "ok";
@@ -2899,13 +2911,14 @@
<&camcc CAM_CC_IFE_LITE_CLK>, <&camcc CAM_CC_IFE_LITE_CLK>,
<&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>; <&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>;
clock-rates = clock-rates =
<0 0 0 266666667 0 0>,
<0 0 0 400000000 0 0>, <0 0 0 400000000 0 0>,
<0 0 0 480000000 0 0>, <0 0 0 480000000 0 0>,
<0 0 0 480000000 0 0>, <0 0 0 480000000 0 0>,
<0 0 0 480000000 0 0>, <0 0 0 480000000 0 0>,
<0 0 0 480000000 0 0>; <0 0 0 480000000 0 0>;
clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
"turbo"; "svs_l1", "nominal", "turbo";
src-clock-name = "ife_lite_clk_src"; src-clock-name = "ife_lite_clk_src";
clock-control-debugfs = "true"; clock-control-debugfs = "true";
cam_hw_pid = <19>; cam_hw_pid = <19>;
@@ -2939,13 +2952,14 @@
<&camcc CAM_CC_IFE_LITE_CLK>, <&camcc CAM_CC_IFE_LITE_CLK>,
<&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>; <&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>;
clock-rates = clock-rates =
<0 266666667 0 0 0 0>,
<0 400000000 0 0 0 0>, <0 400000000 0 0 0 0>,
<0 480000000 0 0 0 0>, <0 480000000 0 0 0 0>,
<0 480000000 0 0 0 0>, <0 480000000 0 0 0 0>,
<0 480000000 0 0 0 0>, <0 480000000 0 0 0 0>,
<0 480000000 0 0 0 0>; <0 480000000 0 0 0 0>;
clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
"turbo"; "svs_l1", "nominal", "turbo";
src-clock-name = "ife_lite_csid_clk_src"; src-clock-name = "ife_lite_csid_clk_src";
clock-control-debugfs = "true"; clock-control-debugfs = "true";
status = "ok"; status = "ok";
@@ -2978,13 +2992,14 @@
<&camcc CAM_CC_IFE_LITE_CLK>, <&camcc CAM_CC_IFE_LITE_CLK>,
<&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>; <&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>;
clock-rates = clock-rates =
<0 0 0 266666667 0 0>,
<0 0 0 400000000 0 0>, <0 0 0 400000000 0 0>,
<0 0 0 480000000 0 0>, <0 0 0 480000000 0 0>,
<0 0 0 480000000 0 0>, <0 0 0 480000000 0 0>,
<0 0 0 480000000 0 0>, <0 0 0 480000000 0 0>,
<0 0 0 480000000 0 0>; <0 0 0 480000000 0 0>;
clock-cntl-level = "lowsvs", "svs", "svs_l1", "nominal", clock-cntl-level = "lowsvsd1", "lowsvs", "svs",
"turbo"; "svs_l1", "nominal", "turbo";
src-clock-name = "ife_lite_clk_src"; src-clock-name = "ife_lite_clk_src";
clock-control-debugfs = "true"; clock-control-debugfs = "true";
cam_hw_pid = <20>; cam_hw_pid = <20>;
@@ -3011,9 +3026,10 @@
<&camcc CAM_CC_CPHY_RX_CLK_SRC>, <&camcc CAM_CC_CPHY_RX_CLK_SRC>,
<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>; <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>;
clock-rates = clock-rates =
<266666667 0>,
<400000000 0>, <400000000 0>,
<480000000 0>; <480000000 0>;
clock-cntl-level = "lowsvs", "nominal"; clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
src-clock-name = "cphy_rx_clk_src"; src-clock-name = "cphy_rx_clk_src";
status = "ok"; status = "ok";
}; };
@@ -3038,9 +3054,10 @@
<&camcc CAM_CC_CPHY_RX_CLK_SRC>, <&camcc CAM_CC_CPHY_RX_CLK_SRC>,
<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>; <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>;
clock-rates = clock-rates =
<266666667 0>,
<400000000 0>, <400000000 0>,
<480000000 0>; <480000000 0>;
clock-cntl-level = "lowsvs", "nominal"; clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
src-clock-name = "cphy_rx_clk_src"; src-clock-name = "cphy_rx_clk_src";
status = "ok"; status = "ok";
}; };
@@ -3065,9 +3082,10 @@
<&camcc CAM_CC_CPHY_RX_CLK_SRC>, <&camcc CAM_CC_CPHY_RX_CLK_SRC>,
<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>; <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>;
clock-rates = clock-rates =
<266666667 0>,
<400000000 0>, <400000000 0>,
<480000000 0>; <480000000 0>;
clock-cntl-level = "lowsvs", "nominal"; clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
src-clock-name = "cphy_rx_clk_src"; src-clock-name = "cphy_rx_clk_src";
status = "ok"; status = "ok";
}; };
@@ -3261,7 +3279,7 @@
<&camcc CAM_CC_OFE_HDR_CLK>, <&camcc CAM_CC_OFE_HDR_CLK>,
<&camcc CAM_CC_OFE_MAIN_FAST_AHB_CLK>; <&camcc CAM_CC_OFE_MAIN_FAST_AHB_CLK>;
clock-rates = clock-rates =
<0 0 338000000 0 0 0 0 0 0 0 0>, <0 0 338800000 0 0 0 0 0 0 0 0>,
<0 0 484000000 0 0 0 0 0 0 0 0>, <0 0 484000000 0 0 0 0 0 0 0 0>,
<0 0 586000000 0 0 0 0 0 0 0 0>, <0 0 586000000 0 0 0 0 0 0 0 0>,
<0 0 688000000 0 0 0 0 0 0 0 0>, <0 0 688000000 0 0 0 0 0 0 0 0>,

133
trustedvm-pineapple-camera.dtsi
View File

@@ -1258,23 +1258,25 @@
msm_cam_smmu_icp { msm_cam_smmu_icp {
compatible = "qcom,msm-cam-smmu-cb"; compatible = "qcom,msm-cam-smmu-cb";
iommus = <&apps_smmu 0x1820 0x00>, iommus = <&apps_smmu 0x18C2 0x00>,
<&apps_smmu 0x18C0 0x00>, <&apps_smmu 0x1841 0x00>,
<&apps_smmu 0x1800 0x00>, <&apps_smmu 0x1881 0x00>,
<&apps_smmu 0x1840 0x00>, <&apps_smmu 0x1808 0x20>;
<&apps_smmu 0x1880 0x00>;
cam-smmu-label = "icp"; cam-smmu-label = "icp";
qcom,iommu-faults = "stall-disable", "non-fatal"; qcom,iommu-faults = "stall-disable", "non-fatal";
qcom,iommu-dma-addr-pool = <0x0 0xf9500000 0xf 0x06a00000>; /* dma-addr-pool is iova address range for io region */
/* here size of dma-addr-pool is appoximately 2.5GB */
qcom,iommu-dma-addr-pool = <0x0 0x1FF00000 0x0 0xC0000000>;
dma-coherent; dma-coherent;
/* TVM iova address range can be between 48MB to 3GB */
icp_iova_mem_map: iova-mem-map { icp_iova_mem_map: iova-mem-map {
iova-mem-region-shared { iova-mem-region-shared {
/* Shared region is ~900MB long */ /* Shared region is ~423MB long */
iova-region-name = "shared"; iova-region-name = "shared";
/* Start address: 0xc0700000 */ /* Start address: 0x5800000 */
iova-region-start = <0x0 0xc0700000>; iova-region-start = <0x0 0x5800000>;
/* Length: 0x38e00000 */ /* Length: 0x1a700000 */
iova-region-len = <0x0 0x38e00000>; iova-region-len = <0x0 0x1a700000>;
iova-region-id = <0x1>; iova-region-id = <0x1>;
status = "ok"; status = "ok";
}; };
@@ -1282,8 +1284,8 @@
iova-mem-region-fwuncached-region { iova-mem-region-fwuncached-region {
/* FW uncached region is 5 MB long */ /* FW uncached region is 5 MB long */
iova-region-name = "fw_uncached"; iova-region-name = "fw_uncached";
/* Start address: 0xc0200000 */ /* Start address: 0x5300000 */
iova-region-start = <0x0 0xc0200000>; iova-region-start = <0x0 0x5300000>;
/* Length: 0x500000 */ /* Length: 0x500000 */
iova-region-len = <0x0 0x500000>; iova-region-len = <0x0 0x500000>;
iova-region-id = <0x6>; iova-region-id = <0x6>;
@@ -1293,48 +1295,35 @@
/* Used for HFI queues/sec heap */ /* Used for HFI queues/sec heap */
iova-mem-region-generic-region { iova-mem-region-generic-region {
iova-region-name = "icp_hfi"; iova-region-name = "icp_hfi";
iova-region-start = <0x0 0xc0300000>; /* Start address: 0x5300000 */
iova-region-start = <0x0 0x5300000>;
/* Length: 0x200000 */ /* Length: 0x200000 */
iova-region-len = <0x0 0x200000>; iova-region-len = <0x0 0x200000>;
iova-region-id = <0x0>; iova-region-id = <0x0>;
}; };
/* Global Sync Memory for IPC */
iova-mem-region-global-sync-region {
iova-region-name = "global_sync";
iova-region-start = <0x0 0xc0200000>;
/* Length: 0x100000 */
iova-region-len = <0x0 0x100000>;
iova-region-id = <0x2>;
phy-addr = <0x82600000>;
};
}; };
iova-mem-device-region { iova-mem-device-region {
/* Device region is appropriate 1MB */ /* Device region is appropriate 1MB */
iova-region-name = "device"; iova-region-name = "device";
iova-region-start = <0x0 0xc0100000>; /* Start address: 0x5200000 */
iova-region-start = <0x0 0x5200000>;
/* Length: 0x100000 */
iova-region-len = <0x0 0x100000>; iova-region-len = <0x0 0x100000>;
iova-region-id = <0x7>; iova-region-id = <0x7>;
subregion_support; subregion_support;
status = "ok"; status = "ok";
iova-mem-region-synx-hwmutex {
iova-region-name = "synx_hwmutex";
iova-region-start = <0x0 0xc0100000>;
iova-region-len = <0x0 0x1000>;
iova-region-id = <0x1>;
phy-addr = <0x1f4a000>;
};
}; };
iova-mem-region-io { iova-mem-region-io {
/* IO region is approximately 60 GB */ /* IO region is approximately 2.5 GB */
iova-region-name = "io"; iova-region-name = "io";
/* Start address: 0xf9500000 */ /* Start address: 0x1FF00000 */
iova-region-start = <0x0 0xf9500000>; iova-region-start = <0x0 0x1FF00000>;
/* Length: 0xf06a00000 */ /* Length: 0xC0000000 */
iova-region-len = <0xf 0x06a00000>; iova-region-len = <0x0 0xC0000000>;
iova-region-id = <0x3>; iova-region-id = <0x3>;
status = "ok"; status = "ok";
}; };
@@ -1342,8 +1331,8 @@
iova-mem-qdss-region { iova-mem-qdss-region {
/* QDSS region is appropriate 1MB */ /* QDSS region is appropriate 1MB */
iova-region-name = "qdss"; iova-region-name = "qdss";
/* Start address: 0xc0000000 */ /* Start address: 0x5100000 */
iova-region-start = <0x0 0xc0000000>; iova-region-start = <0x0 0x5100000>;
/* Length: 0x100000 */ /* Length: 0x100000 */
iova-region-len = <0x0 0x100000>; iova-region-len = <0x0 0x100000>;
iova-region-id = <0x5>; iova-region-id = <0x5>;
@@ -2646,5 +2635,71 @@
interrupts = <GIC_SPI 417 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 417 IRQ_TYPE_EDGE_RISING>;
status = "ok"; status = "ok";
}; };
}; qcom,cam-icp {
compatible = "qcom,cam-icp";
compat-hw-name = "qcom,icp",
"qcom,ipe0",
"qcom,bps";
num-icp = <1>;
num-ipe = <1>;
num-bps = <1>;
status = "ok";
icp_use_pil;
icp_pc_en;
};
cam_icp: qcom,icp@ac00000 {
cell-index = <0>;
compatible = "qcom,cam-icp_v2_1";
icp-version = <0x0201>;
reg = <0xac02000 0x1000>,
<0x0ac04000 0x1000>;
reg-names = "icp_csr", "icp_wd0";
reg-cam-base = <0x2000 0x4000>;
interrupt-names = "icp";
interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
regulator-names = "gdsc";
nrt-device;
src-clock-name = "icp_clk_src";
clock-control-debugfs = "true";
fw_name = "CAMERA_ICP";
ubwc-ipe-fetch-cfg = <0x707b 0x7083>;
ubwc-ipe-write-cfg = <0x161ef 0x1620f>;
ubwc-bps-fetch-cfg = <0x707b 0x7083>;
ubwc-bps-write-cfg = <0x161ef 0x1620f>;
qos-val = <0x808>;
cam_hw_pid = <11>;
vmrm-resource-ids = <29 29 29>;
status = "ok";
};
cam_ipe0: qcom,ipe0@ac42000 {
cell-index = <0>;
compatible = "qcom,cam-ipe680";
reg = <0xac42000 0x18000>;
reg-names = "ipe0_top";
reg-cam-base = <0x42000>;
regulator-names = "ipe0-vdd";
nrt-device;
src-clock-name = "ipe_nps_clk_src";
clock-control-debugfs = "true";
cam_hw_pid = <15 14 13 31>;
vmrm-resource-ids = <30 30 30>;
status = "ok";
};
cam_bps: qcom,bps@ac2c000 {
cell-index = <0>;
compatible = "qcom,cam-bps680";
reg = <0xac2c000 0xb000>;
reg-names = "bps_top";
reg-cam-base = <0x2c000>;
regulator-names = "bps-vdd";
nrt-device;
src-clock-name = "bps_clk_src";
clock-control-debugfs = "true";
cam_hw_pid = <6 30>;
vmrm-resource-ids = <31 31 31>;
status = "ok";
};
};